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參數(shù)資料
| 型號： | SX52BD |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug |
| 中文描述： | 配置通信控制器與電子工程/閃存程序存儲器，在系統(tǒng)編程能力，以及片上調試 |
| 文件頁數(shù)： | 1/58頁 |
| 文件大?。?/td> | 873K |
| 代理商： | SX52BD |
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2002 Ubicom, Inc. All rights reserved.
- 1 -
www.ubicom.com
Ubicom and the Ubicom logo are trademarks of Ubicom, Inc.
I
C is a trademark of Philips Corporation.
All other trademarks mentioned in this document are property of their respec-
tive companies.
April, 2002
SX48BD/SX52BD
Configurable Communications Controllers with EE/Flash Program
Memory, In-System Programming Capability, and On-Chip Debug
1.0
1.1
The Ubicom SX48BD/SX52BD are members of the SX
family of configurable communications controllers fabri-
cated in an advanced CMOS process technology. The
advanced process, combined with a RISC-based archi-
tecture, allows high-speed computation, flexible I/O con-
trol, and efficient data manipulation. Throughput is
enhanced by operating the device at frequencies up to 75
MHz and by optimizing the instruction set to include
mostly single-cycle instructions. In addition, the SX archi-
tecture is deterministic and totally reprogramable. The
unique combination of these characteristics enables the
device to implement hard real-time functions as software
modules (Virtual Peripheral
) to replace traditional hard-
ware functions.
PRODUCT OVERVIEW
Introduction
On-chip functions include two 16-bit timers with 8-bit
prescalers supporting different operating modes (PWM,
simultaneous PWM/capture, and external event counter),
a general-purpose 8-bit timer with prescaler, an analog
comparator, a brown-out detector, a watchdog timer, a
power-save mode with multi-source wakeup capability,
an internal R/C oscillator, user-selectable clock modes,
and high-current outputs.
The SX48BD and SX52BD are functionally the same,
except for the package type and pinout. The SX48BD
has four fewer pins and has only four rather than eight
I/O pins for Port A.
Figure 1-1. Block Diagram
Interrupt
MIWU
Port B
COMPARATOR
Power-On
Reset
RESET
8-bit Watchdog
Timer (WDT)
8-bit Timer
RTCC
8
Internal Data Bus
System
Clock
Brown-Out
MIWU
MCLR
OSC Driver
4MHz Internal
RC OSC
(divided by
8 steps)
Clock
Select
System Clock
OSC1 OSC2
8
3
8-Bit
Prescaler
16-Bit
Timer 2
Port A
4/8
Port C Port D Port E
8
8
8
8
8
8
8
8
In-System
Debugging
In-System
Programming
4k Words
EEPROM
262 Bytes
SRAM
Address
Write Data
8
Read Data
12
Instruction
W
FSR
STATUS
PC
MODE
OPTION
Fetch
8
Address
12
8
8
8
8
ALU
Data
8
8
8
PC
8 Level
Stack
Decode
Execute
Write Back
IREAD
Instruction
Pipeline
Interrupt
Stack
Prescaler for RTCC
or
Postscaler for WDT
8-Bit
Prescaler
16-Bit
Timer 1
Port B
Port C
RTCC
WDT Clock
S
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SX52BD/PQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug |
| SX52F | 制造商:PANJIT 制造商全稱:Pan Jit International Inc. 功能描述:SCHOTTKY BARRIER RECTIFIER |
| SX52F_R1_00001 | 制造商:PANJIT 制造商全稱:Pan Jit International Inc. 功能描述:SCHOTTKY BARRIER RECTIFIER |
| SX52F_R2_00001 | 制造商:PANJIT 制造商全稱:Pan Jit International Inc. 功能描述:SCHOTTKY BARRIER RECTIFIER |
| SX53F | 制造商:PANJIT 制造商全稱:Pan Jit International Inc. 功能描述:SCHOTTKY BARRIER RECTIFIER |
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