參數(shù)資料
型號(hào): SX48BD
廠商: Electronic Theatre Controls, Inc.
英文描述: Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug
中文描述: 配置通信控制器與電子工程/閃存程序存儲(chǔ)器,在系統(tǒng)編程能力,以及片上調(diào)試
文件頁(yè)數(shù): 21/58頁(yè)
文件大?。?/td> 873K
代理商: SX48BD
2002 Ubicom, Inc. All rights reserved.
- 21 -
www.ubicom.com
SX48BD/SX52BD
6.0
The power down mode is entered by executing the
SLEEP instruction.
In power down mode, only the Watchdog Timer (WDT)
and SLEEPCLOCK are active, if enabled. The operation
clock can be enabled or disabled during this mode, by
using the SLEEPCLK bit of the FUSEX register. If the
Watchdog Timer is enabled, upon execution of the
SLEEP instruction, the Watchdog Timer is cleared, the
TO (time out) bit is set in the STATUS register, and the
PD (power down) bit is cleared in the STATUS register.
There are three different ways to exit from the power
down mode:
1. A timer overflow signal from the Watchdog Timer
(WDT).
2. A valid transition on any of the Multi-Input Wakeup pins
(Port B pins).
3. An external reset input on the MCLR pin.
The states of registers (upon wakeup) are described in
Section 14.0.
To achieve the lowest possible power consumption, the
Watchdog Timer should be disabled (the sleep clock
should be disabled) and the device should exit the power
down mode through the (Multi-Input Wakeup) MIWU pins
or an external reset. In addition, the SLEEPCLOCK
should be disabled during the power down mode.
Bit 11 of the FUSEX can be used to enable (clear bit to 0)
the clock operation during the power down mode (to
POWER DOWN MODE
allow fast clock start-up upon exiting the power down
mode).
6.1
Multi-Input Wakeup
Multi-Input Wakeup is one way of causing the device to
exit the power down mode. Port B is used to support this
feature. The WKEN_B register (Wakeup Enable Regis-
ter) allows any Port B pin or combination of pins to cause
the wakeup. Clearing a bit in the WKEN_B register
enables the wakeup on the corresponding Port B pin. If
multi-input wakeup is selected to cause a wakeup, the
trigger condition on the selected pin can be either rising
edge (low to high) or falling edge (high to low). The
WKED_B register (Wakeup Edge Select) selects the
desired transition edge. Setting a bit in the WKED_B reg-
ister selects the falling edge on the corresponding Port B.
Resetting the bit selects the rising edge. The WKEN_B
and WKED_B registers are set to FFh upon reset.
Once a valid transition occurs on the selected pin, the
WKPND_B register (Wakeup Pending Register) latches
the transition in the corresponding bit position. A logic
1
indicates the occurrence of the selected trigger edge on
the corresponding Port B pin. The WKPND_B comes up
with undefined value upon reset. The user program must
clear the WKPND_B register prior to enabling the inter-
rupt.
Upon exiting the power down mode, the Multi-Input
Wakeup logic causes program counter to branch to the
maximum program memory address (same as reset).
Figure 6-1 shows the Multi-Input Wakeup block diagram.
Figure 6-1. Multi-Input Wakeup Block Diagram
W
I
MODE
Wake-up: Exit Power Down
8
8
RB7
RB6
RB1
RB0
WKED_B
WKPND_B
WKEN_B
0 = Enable
1 = Disable
MODE=09/19
M
M
Port B
Configured
as Input
0 1
8
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