參數(shù)資料
型號： SX48BD
廠商： Electronic Theatre Controls, Inc.
英文描述： Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug
中文描述： 配置通信控制器與電子工程/閃存程序存儲器，在系統(tǒng)編程能力，以及片上調(diào)試
文件頁數(shù)： 35/58頁
文件大小： 873K
代理商： SX48BD
2002 Ubicom, Inc. All rights reserved.
- 35 -
www.ubicom.com
SX48BD/SX52BD
Timer T2 Control B Register (T2CNTB)
PORTRD
7
T2CPEDG
6
T2EXEDG
5
T2PS2-T2PS0
3
T2MC1-T2MC0
1
4
2
0
PORTRD
Port Read mode. This bit determines how the device reads data from its I/O ports (Port A through Port
E). Clear this bit to 0 to have the device read data from the port I/O pins directly. Set this bit to 1 to have
the device read data from the port data registers. Under normal (output mode) conditions, it should not
matter which method you use to read the port data. However, if a port pin is configured as an output
and an external circuit forces the pin to the wrong value, the value read from the port will depend on the
reading mode used. Note that this control bit is not related to multi-function timers T1 and T2.
Timer T2 Capture Edge. This bit sets the edge sensitivity of the Timer T2 input capture pins, Capture 1
and Capture 2 (RC0 and RC1). Set this bit to 1 to sense positive-going (low-to-high) edges. Clear this
bit to 0 to sense negative-going (high-to-low) edges.
Timer T2 External Event Clock Edge. This bit sets the edge sensitivity of the Timer T2 input used to
count external events (RC3). Set this bit to 1 to sense positive-going (low-to-high) edges. Clear this bit
to 0 to sense negative-going (high-to-low) edges.
Timer T2 Prescaler Divider field. This 3-bit field specifies the divide-by factor for generating the timer
clock from the on-chip system clock:
T2CPEDG
T2EXEDG
T2PS2-
T2PS0
000 = divide by 1
001 = divide by 2
010 = divide by 4
011 = divide by 8
100 = divide by 16
101 = divide by 32
110 = divide by 64
111 = divide by 128
For example, setting this field to 010 sets the divide-by factor to 4, which means that the T2 counter
register is incremented once every four system clock cycles.
Timer T2 Mode Control field. This 2-bit field specifies the Timer T1 operating mode as follows:
00 = Software Timer mode
01 = PWM mode
10 = Capture/Compare mode
11 = External Event mode
T2MC1-
T2MC0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SX48BD/TQ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug
SX48BD-G 功能描述:8位微控制器 -MCU RISC 75MHz 36I/O 262kB RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
SX48BDITQ 功能描述:8位微控制器 -MCU TQFP UBICOM MICRO RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
SX-49-0534 制造商:Amphenol Corporation 功能描述:
SX491 制造商:Mallory Sonalert Products Inc 功能描述:Cap Film 91pF 500V PS 5% (7.1 X 12mm) Axial 70°C
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