參數(shù)資料
型號： SX48BD
廠商： Electronic Theatre Controls, Inc.
英文描述： Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug
中文描述： 配置通信控制器與電子工程/閃存程序存儲器，在系統(tǒng)編程能力，以及片上調(diào)試
文件頁數(shù)： 16/58頁
文件大?。?/td> 873K
代理商： SX48BD
2002 Ubicom, Inc. All rights reserved.
- 16 -
www.ubicom.com
SX48BD/SX52BD
4.5
FUSE WORD (READ/PROGRAM VIA PROGRAMMING COMMAND)
Unused
11
SYNC
10
Unused Unused IRC DIV1/IFBD DIV0/FOSC2 XTLBUF_EN CP
9
8
7
6
WDTE
2
FOSC1
1
FOSC0
0
5
4
3
SYNC
Synchronous input enable (this bit synchronizes the signal presented at the input pins to the internal
clock through two internal flip-flops). Required to be enabled unless the transition on the input pin is
not close to the clock edge. If enabled, port data must be read more than 2 cycles after a change to
the input level mode or Schmitt Trigger mode (see Figure 3-2). SYNC is always enabled on RTCC.
0 =
enabled
1 =
disabled
Internal RC oscillator enable
0 =
enabled - OSC1 is pulled low by weak pulldown, OSC2 is pulled high by weak pullup
1 =
disabled - OSC1 and OSC2 behave according to FOSC2:FOSC0
Internal RC oscillator divider (if IRC = 0)
00b =
4 MHz
01b =
1 MHz
10b =
128 KHz
11b =
32 KHz
Internal crystal/resonator oscillator feedback resistor (10M
)
0 =
Internal feedback resistor disable (external feedback required for crystal/resonator oscillator)
1 =
Internal feedback resistor enabled (valid only when IRC = 1, disabled when IRC = 0)
Crystal Buffer enable (disable when not using a crystal to reduce Idd)
0 =
Crystal Buffer disabled (required if not using crystal/resonator oscillator)
1 =
Crystal Buffer enabled
Code protect enable
0 =
enabled (FUSE, code, and ID memories read back as scrambled data, programming dis-
abled)
1 =
disabled (FUSE, code, and ID memories can be read normally)
Watchdog timer enable
0 =
disabled
1 =
enabled
FOSC2:FOSC0 External oscillator configuration (valid when IRC = 1, lower settings are recommended for lower power
consumption):
000b =
LP1
–
low power crystal (32KHz)
001b =
LP2
–
low power crystal/resonator (32KHz - 1MHz)
010b =
XT1
–
normal crystal/resonator (32KHz - 1MHz)
011b =
XT2
–
normal crystal/resonator (1MHz - 8MHz)
100b =
HS1
–
high speed crystal/resonator (1MHz - 20MHz)
101b =
HS2
–
high speed crystal/resonator (1MHz - 50MHz)
110b =
HS3
–
high speed crystal/resonator (1MHz - 75MHz)
111b =
External RC network - OSC2 is pulled high by a weak pullup (no CLKOUT output)
IRC
DIV1:DIV0
IFBD
XTLBUF_EN
CP
WDTE
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SX48BD/TQ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability, and On-Chip Debug
SX48BD-G 功能描述:8位微控制器 -MCU RISC 75MHz 36I/O 262kB RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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SX-49-0534 制造商:Amphenol Corporation 功能描述:
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