參數(shù)資料
型號(hào)： STV0299B
廠商： 意法半導(dǎo)體
英文描述： QPSK/BPSK LINK IC
中文描述： 調(diào)制/ BPSK調(diào)制連接IC
文件頁(yè)數(shù)： 19/36頁(yè)
文件大小： 242K
代理商： STV0299B
STV0299B
19/36
5
REGISTER LIST
Note:
All register addresses are hexadecimal values. Signed registers are 2
’
s complement. All registers are read/write registers except
those specifically flagged as read-only (RO). All registers not listed in the below table, between 0 and 4E, should be programmed to
0.
Name
HEX
Address
Reset
Value
Bit
Position
Signal Description
IDENTIFICATION REGISTER (Read Only)
(refer to Section 4.1.6
on page 8
)
ID
00
A1
[7:0]
Gives the release number of the circuit in order to ensure software
compatibility.
REFERENCE CLOCK REGISTER
(refer to Section 4.1.8
on page 8
)
RCR
01
18 or 38
[7:6]
K[1:0]
5
DIRCLK
(Reset value depends on the polarity of DIRCLK-DIS pin).
[4:0]
M[4:0]
MASTER CLOCK REGISTER
(refer to Section 4.1.8
on page 8
)
MCR
02
34 or B4
7
STDBY
(Reset value depends on the polarity of STDBY pin).
6
VCO ON/OFF
0: ON
1: OFF
[5:4]
These bits must be programmed to one.
3
SERCLK
0: Maximum instantaneous SERCL = Master Clock
1: Maximum instantaneous SERCL =
[2:0]
P[2:0]
VC0 to M_CLK divider
-----------------
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