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參數(shù)資料
| 型號： | STV0299B |
| 廠商： | 意法半導體 |
| 英文描述： | QPSK/BPSK LINK IC |
| 中文描述： | 調(diào)制/ BPSK調(diào)制連接IC |
| 文件頁數(shù)： | 11/36頁 |
| 文件大?。?/td> | 242K |
| 代理商： | STV0299B |
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STV0299B
11/36
For the
“
Unmodulated Tone Burst
”
Port CTRL 2 is
set to 0 and, only one byte, of value 00h is sent.
The parity bit is still 1, and as a result, the signal is
a continuous train of 12.5 ms. When the
modulation is active, the DiSEqC output is driven
alternatively to V
DD
and V
SS
levels. The DiSEqC
and Lock Control, DiSEqC FIFO and DiSEqC
Status Registers are in Addresses 08, 09 and
0Ah.
Figure 5:
Schematic showing Bit Transmission
Table 3:
PortCtrl (1:0)
Note:
1
2
Byte to transfer in DiSEqC mode.
In mode PortCtrl (1:0)=10, the F
22
/DiSEqC pin returns to High -2 mode once the transmission is completed.
4.1.13 Standby Mode
A low power consumption mode (standby mode)
can be implemented (in this mode, f
M_CLK
= 0). In
standby mode, the I
2
C decoder still operates, but
with some restrictions (see Sections 4.1.4and
4.1.5).
Standby mode can be initiated or stopped by I
2
C
bus commands as described in MCR Register 02.
At power-on, the circuit starts to operate in
standby mode when the STDBY pin (pin 42) is
tied to V
DD
. This guarantees low power
consumption
for
the
(PCMCIA size front-end modules) before any
command is initiated. After the power-on
sequence, the standby mode is entirely controlled
via MCR Register (02).
stand-alone
modules
Idle
11 Periods
11 Periods
11 Periods
Next bit
Transmission of 1
’
s
Transmission of 0
’
s:
a) PortCtrl2 = 1
b) PortCtrl2 = 0
PortCtrl (2)
FIFO
Output
00
X
empty
0
01
X
empty
1
10
0
DATA = 00
Unmodulated tone burst
1
DATA = FFor00
Modulated tone burst
1
Note 1
DiSEqC signal
11
X
XX
Continuous tone
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