
May 2000
1/36
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
STV0299B
QPSK/BPSK LINK IC
I
MULTISTANDARD
DEMODULATION
I
EASY IMPLEMENTATION WITH LOW COST
DIRECT CONVERSION TUNERS
I
EXTREMELY
LOW
CO-CHANNEL INTERFERENCE
I
WIDE CARRIER LOOP TRACKING RANGE TO
COMPENSATE FOR DISH FREQUENCY DRIFT
I
COMMON INTERFACE COMPLIANT
I
VERY LOW POWER CONSUMPTION
I
INTEGRATED DUAL 6-BIT ANALOG TO
DIGITAL CONVERTERS
I
DUAL DIGITAL AGC
I
DIGITAL NYQUIST ROOT FILTER WITH
ROLL-OFF OF 0.35 OR 0.20
I
DIGITAL
CARRIER
DETECTOR,
ON-CHIP
DEROTATOR
AND
(TYP ± 45 MHz)
I
DIGITAL TIMING RECOVERY WITH LOCK
DETECTOR
I
CHANNEL BIT RATE UP TO 90 Mbps AND
SYMBOL
FREQUENCY
1 TO 50 MSYMBOLS
I
INNER DECODER:
- VITERBI
SOFT
CONVOLUTIONAL CODES, M=7, RATE 1/2
- PUNCTURED CODES 1/2, 2/3, 3/4, 5/6, 6/7 AND 7/8
I
SYNCHROWORD EXTRACTION
I
CONVOLUTIVE DEINTERLEAVER
I
OUTER DECODER:
- REED-SOLOMON
16 PARITY BYTES; CORRECTION OF UP
TO 8 BYTE ERRORS
- ENERGY DISPERSAL DESCRAMBLER
I
ON-CHIP FLEXIBLE CLOCK SYSTEMS TO
ALLOW
USE
OF
SIGNALS IN 4 MHz TO 30 MHz RANGE
I
EASY-TO-USE C/N ESTIMATOR WITH 2 TO
18 dB RANGE
I
I
2
C SERIAL BUS AND REPEATER
I
DVB COMMON INTERFACE COMPLIANT
PARALLEL OUTPUT FORMAT
I
PARALLEL AND SERIAL DATA OUTPUT
I
LNB SUPPLY CONTROL WITH STANDARD I/O,
22 KHz TONE AND DISEQC
TM
MODULATOR
WITH TTL OUTPUT
I
CMOS TECHNOLOGY: 2.5 V OPERATION;
JEDEC (EIA/JESD8-5)
QPSK
AND
BPSK
BER
WHEN
LOOP
WITH
WIDE
TRACKING
LOCK
RANGE
LOOP
RATE
FROM
DECODER
FOR
DECODER
FOR
EXTERNAL
CLOCK
APPLICATIONS
I
DIGITAL
SET-TOP BOXES
SATELLITE
RECEIVER
AND
DESCRIPTION
The STV0299 Satellite Receiver with FEC is a
CMOS single-chip multistandard demodulator for
digital satellite broadcasting. It consists of two A/D
converters for I-input and Q-input, a multistandard
QPSK and BPSK demodulator, and a forward
error correction (FEC) unit having both an inner
(Viterbi) and outer (Reed-Solomon) decoder.
The FEC unit is compliant with the DVB-S and
DSS
TM
specifications. Processing is fully digital.
It integrates a derotator before the Nyquist root
filter, allowing a wide range of offset tracking.
The
high
sampling
implementation of low-cost, direct conversion
tuners.
A variety of configurations and behaviours can be
selected through a bank of control/configuration
registers via an I
2
C. The chip outputs MPEG
Transport Streams and interfaces seamlessly to
the Packet Demultiplexers embedded in ST’s
ST20-TPx or STi55xx. High sampling frequency
(up to 90MHz) considerably reduces the cost of
LPF of direct conversion tuners.
The multistandard capability associated with a
broad range of input frequency operations makes
it easy-to-use. Its low power consumption, small
package and optional serial output interface
makes it perfect for embedding into a tuner.
rate
facilitates
the
TQFP64
(10 x 10 x 1.4 mm)
(Thin Plastic Quad Flat Pack)
ORDER CODE:
STV0299B (
No Slug)