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參數(shù)資料
| 型號： | STLC1511 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | NorthenLite⑩ G.lite BiCMOS Analog Front-End Circuit |
| 中文描述： | NorthenLite⑩G.lite的BiCMOS模擬前端電路 |
| 文件頁數(shù)： | 8/31頁 |
| 文件大?。?/td> | 358K |
| 代理商： | STLC1511 |
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STLC1511
8/31
Power Up Time
18
Rx @ DS
19
Rx @ US
20
100
530
mse
c
Time to meet output SNR
requirement
<1>For the purposes of this specification, a gain of 1 or 0dB is defined as the ratio of the full scale ADC output word to the input voltage
at RXINP/RXINN when the input to the Rx path is at 2.4Vp differential measured between RXINP and RXINN.
<2>For G.lite the STLC1511 will support both CO and CPE applications. As such it needs to support rates from 30kHz to 120kHz (CO
Receive band) and 155kHz to 540kHz (CPE Receive band).
<3>First stage gain is measured from RXINP/RXINN (differential input) to RXOP/RXON (differential output). Note that the gain from
input to output can be adjusted for single ended input or differential input so that the output signal level at the output of the first
stage of the PGA is at full scale. For a single ended input, the unused input, either RXINP or RXINN must be ac coupled to ground.
<4>Second stage gain is measured from RXDCINP/RXDCINN (differential input) to the output of the ADC.
<5>Will be tested at Vcc=5.0V, 27
o
C, and f=275kHz.
<6>Will be tested at Vcc=5.0V and f=275kHz.
<7>Will be tested at 27
o
C and f=275kHz.
<8>Will be tested at Vcc=5.0V and 27
o
C.
<9>Due to 1/f component, the spot noise is maximum at 30kHz over the bands of interest (US and DS).
<10>Noise voltage is specified as the noise spectral density (e
n
) at the input. Conversion to power spectral density is as follows
<11>Input referred noise assumes that there is a 7dB cut in the first band of aliased noise which falls into the DMT frequencies and
that higher order aliases are negligible. For example, the single ended input referred noise for the maximum gain setting of 40dB
is calculated as follows:
In general, the single ended input referred noise can be calculated as follows:
where G1 and G2 are the gains of the first and second stages of the RxPGA respectively. Note that the assumption of a 7dB cut
on the aliased noise is also used in the above formula and that all other higher order noise is sufficiently suppressed.
<12>Note that the Rx path noise at 0dB gain is dominated by the quantization noise of the ADC and as such there is very little process,
vcc, or temperature dependency and the variation from typical to maximum noise is only due to the Rx PGA.
<13>At maximum gain PGA and Rx input opamp noise are the dominant contributors.
<14>Two tone distortion is measured with two sinewaves with each sinewave at an amplitude of 1/2 full scale. Tone one is at
f1=400kHz and tone two is at f2=500kHz. The two tone distortion requirement is measured from the rms voltage of a single signal
tone to the peak rms voltage of the distortion products.
<15>A multi-tone sine wave is used for the DS Multi-tone test. (The multi-tone signal will be 89 sinewaves equally spaced from
36*4.3125kHz to 125*4.3125kHz with a peak-to-rms ratio of 5.3V/V and an rms voltage equal to 1/5.3 of the peak full scale range
of the PGA.) Multi-tone test measures the difference between the rms voltage of a single tone at the output to the rms voltage of
the peak distortion product at the output in the band of interest.
<16>A multi-tone sine wave is used for the US Multi-tone test. (The multi-tone signal will be 22 sinewaves equally spaced from
7*4.3125kHz to 28*4.3125kHz with a peak-to-rms ratio of 5.3V/V and an rms voltage equal to 1/5.3 of the peak full scale range
of the PGA.) Multi-tone test measures the difference between the rms voltage of a single tone at the output to the rms voltage of
the peak distortion product at the output in the band of interest.
<17>The 1t settling time is roughly equivalent to the unity gain frequency of the PGA block.
<18>The power up time is the time it takes the power up transient to dissipate such that the output SNR specification is met. This time
is dominated by the coupling capacitors at pins
RXINP/N
and
RXDCIP/N
.
Unless otherwise noted, typical specifications apply for VCC=5.0Volts, temperature=27×C, nominal process and
current. Maximum and minimum performance is with VCC±±5%, -40=<T
junction
=<105×C, and worst case process.
Description
min
typ
max
Units
Comments
PSD
10
2
---------
1000
×
log
×
=
en
1
10
-----------------
+
17nV
Hz
(
)
2
10
------------------------------
2
+
10
---------------------------------
2
+
=
en
1
10
-----------------
+
17nV
·
Hz
(
)
2
10
------------------------------
2
+
10
------------------------------------
2
+
=
Table 2. Receive Path Specifications
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