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參數(shù)資料
| 型號(hào)： | STLC1511 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | NorthenLite⑩ G.lite BiCMOS Analog Front-End Circuit |
| 中文描述： | NorthenLite⑩G.lite的BiCMOS模擬前端電路 |
| 文件頁(yè)數(shù)： | 18/31頁(yè) |
| 文件大小： | 358K |
| 代理商： | STLC1511 |
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STLC1511
18/31
3.5 Reference Voltages
3.6 Serial Interface
The serial interface on the AFE provides for transmis-
sion of transmit and receive data between the
STLC1511 and digital modem ASIC. This is accom-
plished with a two bit wide data stream in each direc-
tion plus the appropriate clocks. The data for the
transmit path is input to the AFE on the
TXSIN[1:0]
pins and the data for the receive path is output on the
RXSOUT[1:0]
pins.
The serial interface also consists of a 35.328MHz
clock (
CK35M
) which is generated in the STLC1510
and is used to retime the Tx data sent to the
STLC1511. It is also used in the STLC1511 to retime
the Rx data before it is sent to the digital chip.
A 4.416MHz pulse is also output from the STLC1511.
This pulse on pin
FRMCLK
is used to indicate the
start of the output and input data words. The align-
ment of the data to the
FRMCLK
signal is shown be-
low.
A diagram of this interface is show in Figure 11.
Note the MSB of each of the 8-bit registers is trans-
ferred first (MSB = b15/ b7.)
Note that the data word used by the converters is in
2’s complement notation.
Table 7. Reference Voltages/Currents
Unless otherwise noted, typical specifications apply for VCC = 5.0 V, temperature=25×C, nominal process and bias
current. Maximum and minimum performance is with VCC ± 5%, -40 =<T
junction
=< 105×C, and worst case process
and bias current.
Description
min
typ
max
Units
Comments
V3P75V Output voltage
3.750
3.8625
Volts
measured at V3P75V
Output Referred Noise Voltage
at ANG
10
measured at V3P75V
TXDADC1 Output voltage
2.425
2.5V
2.575
Volts
measured at TXDADC1
TXDADC1 Output current
50
mA
measured at TXDADC1
External resistor at IREF
49
50
51
kW
assume 2%
External capacitor at V3P75V
0.22
mF
Hz
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