參數(shù)資料
型號： SPMC916X1CTH16
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP120
封裝： QFP-120
文件頁數(shù)： 16/172頁
文件大?。?/td> 1200K
代理商： SPMC916X1CTH16
MOTOROLA
MC68HC916X1
112
MC68HC916X1TS/D
CPTQP[3:0] — Completed Queue Pointer
CPTQP[3:0] points to the last command executed. It is updated when the current command is complete.
When the first command in a queue is executing, CPTQP[3:0] contains either the reset value ($0) or a
pointer to the last command completed in the previous queue.
7.4.3 QSPI RAM
The QSPI contains an 80-byte block of dual-access static RAM that is used by both the QSPI and
the CPU. The RAM is divided into three segments: receive data, transmit data, and command con-
trol data. Receive data is information received from a serial device external to the MCU. Transmit
data is information stored by the CPU for transmission to an external peripheral. Command control
data is used to perform the transfer.
Figure 21 displays the organization of the RAM.
Figure 21 QSPI RAM
Once the CPU has set up the queue of QSPI commands and enabled the QSPI, the QSPI can op-
erate independently of the CPU. The QSPI executes all of the commands in its queue, sets a flag
indicating that it is finished, and then either interrupts the CPU or waits for CPU intervention. It is
possible to execute a queue of commands repeatedly without CPU intervention.
RR[0:F] — Receive Data RAM
$YFFD00
Data received by the QSPI is stored in this segment. The CPU reads this segment to retrieve data
from the QSPI. Data stored in receive RAM is right-justified. Unused bits in a receive queue entry
are set to zero by the QSPI upon completion of the individual queue entry. The CPU can access
the data using byte, word, or long-word addressing.
The CPTQP[3:0] value in SPSR shows which queue entries have been executed. The CPU uses
this information to determine which locations in receive RAM contain valid data before reading
them.
TR[0:F] — Transmit Data RAM
$YFFD20
Data that is to be transmitted by the QSPI is stored in this segment. The CPU usually writes one
word of data into this segment for each queue command to be executed.
Information to be transmitted must be written to transmit data RAM in a right-justified format. The
QSPI cannot modify information in the transmit data RAM. The QSPI copies the information to its
data serializer for transmission. Information remains in transmit RAM until overwritten.
QSPI RAM MAP
RECEIVE
RAM
TRANSMIT
RAM
500
51E
520
53E
WORD
540
54F
COMMAND
RAM
BYTE
WORD
RR0
RR1
RR2
RRD
RRE
RRF
TR0
TR1
TR2
TRD
TRE
TRF
CR0
CR1
CR2
CRD
CRE
CRF
F
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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