- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365670 > SP37E760-MC (STANDARD MICROSYSTEMS CORP) 3.3 V I/O CONTROLLER FOR EMBEDDED APPLICATIONS PDF資料下載
參數(shù)資料
| 型號： | SP37E760-MC |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 外設及接口 |
| 英文描述： | 3.3 V I/O CONTROLLER FOR EMBEDDED APPLICATIONS |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP100 |
| 封裝： | QFP-100 |
| 文件頁數(shù)： | 42/78頁 |
| 文件大小： | 510K |
| 代理商： | SP37E760-MC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁當前第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁
soon as there is one byte in the FIFO. If PDRQ goes inactive due to the TC, then PDRQ is active again when there
is one byte in the FIFO, and
serviceIntr
has been re-enabled. (Note: A data underrun may occur if PDRQ is not
removed in time to prevent an unwanted cycle).
5.4.5.10
Programmed I/O Mode or Non-DMA Mode
The ECP or parallel port FIFOs may also be operated using interrupt driven programmed I/O. Software can determine
the writeIntrThreshold, readIntrThreshold, and FIFO depth by accessing the FIFO in Test Mode.
Programmed I/O transfers are to the ecpDFifo at 400H and ecpAFifo at 000H or from the ecpDFifo located at 400H,
or to/from the tFifo at 400H. To use the programmed I/O transfers, the host first sets up the direction and state, sets
dmaEn to 0 and
serviceIntr
to 0.
The ECP requests programmed I/O transfers from the host by activating the PINTR pin. The programmed I/O will
empty or fill the FIFO using the appropriate direction and mode.
Note: A threshold of 16 is equivalent to a threshold of 15. These two cases are treated the same.
5.4.5.11
Programmed I/O - Transfers from the FIFO to the Host
In the reverse direction an interrupt occurs when serviceIntr is 0 and readIntrThreshold bytes are available in the
FIFO. If at this time the FIFO is full it can be emptied completely in a single burst, otherwise readIntrThreshold
bytes may be read from the FIFO in a single burst.
readIntrThreshold =(16-<threshold>) data bytes in FIFO
An interrupt is generated when
serviceIntr
is 0 and the number of bytes in the FIFO is greater than or equal to (16-
<threshold>). (If the threshold = 12, then the interrupt is set whenever there are 4-16 bytes in the FIFO.) The PINT pin
can be used for interrupt-driven systems. The host must respond to the request by reading data from the FIFO. This
process is repeated until the last byte is transferred out of the FIFO. If at this time the FIFO is full, it can be
completely emptied in a single burst, otherwise a minimum of (16-<threshold>) bytes may be read from the FIFO in a
single burst.
5.4.5.12
Programmed I/O - Transfers from the Host to the FIFO
In the forward direction an interrupt occurs when serviceIntr is 0 and there are writeIntrThreshold or more bytes free in
the FIFO. At this time if the FIFO is empty it can be filled with a single burst before the empty bit needs to be
re-read. Otherwise it may be filled with writeIntrThreshold bytes.
writeIntrThreshold = (16-<threshold>) free bytes in FIFO
An interrupt is generated when
serviceIntr
is 0 and the number of bytes in the FIFO is less than or equal to
<threshold>. (If the threshold = 12, then the interrupt is set whenever there are 12 or less bytes of data in the FIFO.)
The PINT pin can be used for interrupt-driven systems. The host must respond to the request by writing data to the
FIFO. If at this time the FIFO is empty, it can be completely filled in a single burst, otherwise a minimum of (16-
<threshold>) bytes may be written to the FIFO in a single burst. This process is repeated until the last byte is
transferred into the FIFO.
SMSC DS – SP37E760
Page 42
Rev. 04/13/2001
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP8720 | ECL two-modulus divider, with ECL10K compatible outputs |
| SP8720ADG | ECL two-modulus divider, with ECL10K compatible outputs |
| SP8720BDG | ECL two-modulus divider, with ECL10K compatible outputs |
| SPF5001 | Surface-mount 4-circuit Low-side Switch Array |
| SPF5002 | Surface-mount 4-circuit Low-side Switch Array |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP37E760-MD | 功能描述:輸入/輸出控制器接口集成電路 Super I/O Controller RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| SP37E760-MT | 功能描述:輸入/輸出控制器接口集成電路 Super I/O Controller RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| SP37R0FL | 制造商:TE Connectivity 功能描述:SP3 7R0 1% LOOSEFixed Resistor |
| SP38 | 制造商:BES 功能描述:3/8" x 6" Spade Bit 制造商:BES MANUFACTURING 功能描述:SPADE BIT 3/8 X 6 INCH |
| SP380 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NOR GATES |
發(fā)布緊急采購，3分鐘左右您將得到回復。