參數(shù)資料
型號： SP37E760-MC
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 外設(shè)及接口
英文描述： 3.3 V I/O CONTROLLER FOR EMBEDDED APPLICATIONS
中文描述： MULTIFUNCTION PERIPHERAL, PQFP100
封裝： QFP-100
文件頁數(shù)： 24/78頁
文件大?。?/td> 510K
代理商： SP37E760-MC
1. Bit 0=1 as long as there is one byte in the RCVR FIFO.
2. Bits 1 to 4 specify which error(s) have occurred. Character error status is handled the same way as when in
the interrupt mode, the IIR is not affected since EIR bit 2=0.
3. Bit 5 indicates when the XMIT FIFO is empty.
4. Bit 6 indicates that both the XMIT FIFO and shift register are empty.
5. Bit 7 indicates whether there are any errors in the RCVR FIFO.
There is no trigger level reached or time-out condition indicated in the FIFO Polled Mode, however, the RCVR and
XMIT FIFOs are still fully capable of holding characters.
Table 11 - Individual UART Channel Register Summary
REGISTER
ADDRESS*
REGISTER NAME
SYMBOL
ADDR = 0
DLAB = 0
(Read Only)
ADDR = 0
DLAB = 0
Register (Write Only)
ADDR = 1
DLAB = 0
SMSC DS – SP37E760
Page 24
Rev. 04/13/2001
REGISTER
BIT 0
BIT 1
Receive Buffer Register
RBR
Data Bit 0 (Note
1)
Data Bit 1
Transmitter Holding
THR
Data Bit 0
Data Bit 1
Interrupt Enable Register
IER
Enable Received
Data Available
Interrupt (ERDAI)
Enable Transmitter
Holding Register
Empty Interrupt
(ETHREI)
Interrupt ID Bit
ADDR = 2
ADDR = 2
Interrupt Ident. Register
(Read Only)
IIR
”0” if Interrupt
Pending
FIFO Control Register
(Write Only)
Line Control Register
FCR
FIFO Enable
RCVR FIFO Reset
ADDR = 3
LCR
Word Length
Select Bit 0
(WLS0)
Data Terminal
Ready (DTR)
Word Length
Select Bit 1
(WLS1)
Request to Send
(RTS)
ADDR = 4
ADDR = 5
ADDR = 6
ADDR = 7
ADDR = 0
DLAB = 1
ADDR = 1
DLAB = 1
MODEM Control Register
MCR
Line Status Register
MODEM Status Register
LSR
MSR
Data Ready (DR)
Delta Clear to
Send (DCTS)
Overrun Error (OE)
Delta Data Set
Ready (DDSR)
Scratch Register (Note 4)
Divisor Latch (LS)
SCR
DDL
Bit 0
Bit 0
Bit 1
Bit 1
Divisor Latch (MS)
DLM
Bit 8
Bit 9
*DLAB is Bit 7 of the Line Control Register (ADDR = 3).
Note 1:
Bit 0 is the least significant bit. It is the first bit serially transmitted or received.
Note 2:
When operating in the XT mode, this bit will be set any time that the transmitter shift register is empty.
Table 12 - Individual UART Channel Register Summary Continued
BIT 3
BIT 4
Data Bit 3
Data Bit 4
BIT 2
BIT 5
BIT 6
BIT 7
Data Bit 2
Data Bit 2
Enable
Receiver Line
Status
Interrupt
(ELSI)
Data Bit 5
Data Bit 6
Data Bit 7
Data Bit 3
Data Bit 4
Data Bit 5
Data Bit 6
Data Bit 7
Enable
MODEM
Status
Interrupt
(EMSI)
0
0
0
0
相關(guān)PDF資料
PDF描述
SP8720 ECL two-modulus divider, with ECL10K compatible outputs
SP8720ADG ECL two-modulus divider, with ECL10K compatible outputs
SP8720BDG ECL two-modulus divider, with ECL10K compatible outputs
SPF5001 Surface-mount 4-circuit Low-side Switch Array
SPF5002 Surface-mount 4-circuit Low-side Switch Array
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SP37E760-MD 功能描述:輸入/輸出控制器接口集成電路 Super I/O Controller RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
SP37E760-MT 功能描述:輸入/輸出控制器接口集成電路 Super I/O Controller RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
SP37R0FL 制造商:TE Connectivity 功能描述:SP3 7R0 1% LOOSEFixed Resistor
SP38 制造商:BES 功能描述:3/8" x 6" Spade Bit 制造商:BES MANUFACTURING 功能描述:SPADE BIT 3/8 X 6 INCH
SP380 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NOR GATES
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*