參數(shù)資料
型號(hào)： SN74LVT8980FK
廠商： Texas Instruments, Inc.
英文描述： EMBEDDED TEST-BUS CONTROLLERS IEEE STD 1149.1 JTAG TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES
中文描述： 嵌入式測(cè)試總線控制器IEEE標(biāo)準(zhǔn)1149.1 JTAG接口，8咨詢大師比特通用主機(jī)接口
文件頁(yè)數(shù)： 28/34頁(yè)
文件大?。?/td> 495K
代理商： SN74LVT8980FK
SN54LVT8980, SN74LVT8980
EMBEDDED TEST-BUS CONTROLLERS
IEEE STD 1149.1 (JTAG) TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES
SCBS676C – DECEMBER 1996 – REVISED AUGUST 1997
28
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
SN54LVT8980
MIN
TYP
SN74LVT8980
MIN
TYP
UNIT
MAX
0.5
MAX
0.5
Outputs high
ICC
Outputs low
VCC= 3 6 V IO= 0 VI= VCCor GND
VCC = 3.6 V, IO = 0, VI = VCC or GND
7
7
mA
Outputs
disabled
0.5
0.5
ICC
VCC = 3 V to 3.6 V,
One input at VCC – 0.6 V,
Other inputs at VCC or GND
VI = 3 V or 0
VO = 3 V or 0
VO = 3 V or 0
0.2
0.2
mA
Ci
Cio
Co
4
4
pF
5
5
pF
7
7
pF
All typical values are at VCC = 3.3 V, TA = 25
°
C.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figures 9 and 10)
SN54LVT8980
VCC = 3.3 V
±
0.3 V
SN74LVT8980
VCC = 3.3
±
0.3 V
VCC = 2.7 V
VCC = 2.7 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
TCK = CLKIN
(CDIV = 0)
0
20
0
16
0
20
0
16
fclock
Clock frequency, CLKIN
TCK = CLKIN/2
(CDIV = 1)
0
40
0
32
0
40
0
32
MHz
TCK
≤
CLKIN/4
(CDIV
≥
2)
0
70
0
64
0
70
0
64
TCK = CLKIN
(CDIV = 0)
25
31
25
31
tw
Pulse
duration
CLKIN
high or low
TCK = CLKIN/2
(CDIV = 1)
12.5
15.6
12.5
15.6
TCK
≤
CLKIN/4
(CDIV
≥
2)
7.1
7.8
7.1
7.8
ns
RST low
10
10
10
10
STRB low
8
8
8
8
A before STRB
↓
Read or write
(R/W high or low)
10
10
10
10
tsu
Setup time
D before STRB
↑
R/W before STRB
↓
TDI before CLKIN
↑
Write (R/W low)
5
5
5
5
ns
5
5
5
5
5
5
5
5
A after STRB
↑
Read or write
(R/W high or low)
5
5
5
5
th
Hold time
D after STRB
↑
Write (R/W low)
15
15
15
15
ns
R/W after STRB
↑
TDI after CLKIN
↑
6
6
6
6
10
10
10
10
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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