參數(shù)資料
型號: SDA9401
廠商: Electronic Theatre Controls, Inc.
英文描述: Scan Rate Converter using Embedded DRAM Technology Units
中文描述: 掃描頻率轉(zhuǎn)換器采用嵌入式DRAM技術(shù)股
文件頁數(shù): 27/69頁
文件大?。?/td> 1142K
代理商: SDA9401
Micronas
27
Preliminary Data Sheet
SDA 9401
6.4
Clock concept
Input signals
Output signals
The SDA 9401 supports different clock concepts. In chapter 10 (see also
chapter Application
information
on page 65) a typical application of the circuit is shown. The front-end clock is
connected to CLK1 input. The CLKOUT pin is connected to the back-end and the X1/CLK2 input is
connected to a crystal oscillator. The next figure explains the different clock switches, which may be
used for the separate modes (see also page 31, “Ingenious configurations of the HOUT and VOUT
generator”).
Clock concept
Clock concept switching matrix
Signals
Pin number
Description
CLK1
X1/CLK2
54
28
System clock 1 input
System clock 2 input
Signals
Pin number
Description
CLKOUT
26
Clock output
CLK11EN (19h)
CLK21EN (19h)
CLKOUT
0
0
1
1
0
X
CLK1
not allowed
CLK2_pll2
c
CLK1
X1/CLK2
PLL1
PLL2
CLK21EN
CLK11EN
CLKOUT
1
0
0
1
CLK1_pll1
CLK2_pll2
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