參數(shù)資料
型號: SDA9401
廠商: Electronic Theatre Controls, Inc.
英文描述: Scan Rate Converter using Embedded DRAM Technology Units
中文描述: 掃描頻率轉(zhuǎn)換器采用嵌入式DRAM技術(shù)股
文件頁數(shù): 11/69頁
文件大?。?/td> 1142K
代理商: SDA9401
Micronas
11
Preliminary Data Sheet
SDA 9401
Field detection and VIN delay
Input write parameter
In case of non-standard signals the field order is indeterminate (e.g. AAA... , BBB... , AAABAAAB...,
etc.). Therefore a special filtering algorithm is implemented, which can be switched on by the
parameter VCRMODE.
The OPDEL parameter is used to adjust the outgoing V-Sync VOUT in relation to the incoming
delayed V-Sync VIN. In case of 50 Hz to 100 Hz interlaced scan rate conversion the OPDEL
parameter should be greater than half the number of lines of a field plus the internal processing
delay (8 lines).
Input write parameter
The internal line counter is used to determine the information about the standard of the incoming
Parameter
[Default value]
Subaddress
Description
VINDEL
[0]
FIEINV
1: Field A=1
0: Field A=0
[0]
VCRMODE
1: on
0: off
[1]
01h
Delay of the incoming V-Sync VIN (must be adjusted
depending on the delay of the HIN signal)
Inversion of the internal field polarity
00h
00h
In case of non standard interlaced signals (VCR, Play-
Stations) a filtering of the internal field signal can be
done (can also be used for normal TV signals)
Parameter
[Default value]
Subaddress
Description
OPDEL
[170]
06h
Delay (in number of lines) of the internal V-Sync
(delayed VIN) to the outgoing V-Sync (VOUT)
H1
H2
VIN
Ffd
Vd
CLK1
(VINDEL * 128 + 1) * Tclk1
Field 1(A)
Vd
Field 2(B)
Ffd
x
x
(VINDEL * 128 + 1) * Tclk1
VIN
f
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