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| 型號： | SAA6721E |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 圖形處理器 |
| 英文描述： | SXGA RGB to TFT graphics engine(XGA RGB 到 TFT圖形引擎) |
| 中文描述： | GRAPHICS PROCESSOR, PBGA292 |
| 封裝： | 27 X 27 MM, 1.75 MM HEIGHT, PLASTIC, SOT-489-1, BGA-292 |
| 文件頁數(shù)： | 52/72頁 |
| 文件大?。?/td> | 360K |
| 代理商： | SAA6721E |
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1999 May 11
52
Philips Semiconductors
Preliminary specification
SXGA RGB to TFT graphics engine
SAA6721E
The values given in Table 17 can be used for frame
resolutions up to 720
×
576 pixels which complies to the
625 line/50 Hz mode.
Table 17
Field start address values
8.5.4
F
RAME RECOVERY
During de-interlacing and also in mode 0, output frames
with the right vertical and horizontal dimensions must be
generated. Since size information is not stored in the
external memory, the output frame resolution must be
programmed into the registers frame_length and
line_length. The first value gives the vertical resolution,
and the second the horizontal resolution in pixels. If no
downscaler is used, these values can be taken directly
from the input interface. If downscaling is activated, the
size of the de-interlacer output frame must be calculated
from the RGB input frame size divided by the downscaling
factors.
If no valid data stream is applied at the RGB/YUV input
interface, the de-interlacer is able to generate a picture by
itself. This will be enabled with blank_screen at
address 25. The colour of this frame is defined by
blank_colour_red, blank_colour_green, and
blank_colour_blue.
8.6
Scaling
Two different scaling units are implemented to perform
both up and downscaling. The downscaling engine, which
is located before the memory interface, and the upscaling
engine after the memory interface.
8.6.1
D
OWNSCALING
If the downscaler is to be used, it must be enabled by
setting flags down_v_scaler_on and down_h_scaler_on.
For vertical scaling a line memory buffer is needed.
This memory must be switched to downscaling mode by
setting down_v_scaler_mem to logic 1 because only one
is available.
FIELD
VALUE (HEX)
Field1 row/column
Field2 row/column
Field3 row/column
Field4 row/column
000/0
08D/0
100/0
180/0
Setting up the desired downscaling ratios is achieved by
programming the scaling increments down_v_incr,
down_v_corr, and down_h_incr, down_h_corr. This must
be done for both vertical and horizontal scaling.
Where xx is equivalent to down_v_incr or down_h_incr
and yy is the fraction of the result in
1
100
.
This is the value for programming the increment correction
values down_v_corr and down_h_corr.
Example: SXGA
→
XGA
Horizontal:
This means down_h_incr = 51 and down_h_corr = 20.
Vertical:
This means down_v_incr = 48 and down_v_corr = 0.
8.6.2
U
PSCALING
The upscaler must be activated by up_v_scaler_on and
up_h_scaler_on. To use the line memory for upscaling,
down_v_scaler_mem must be set to logic 0. To set-up the
zoom factor, the scaling increments up_v_incr, up_v_corr,
up_h_incr, and up_h_corr must be programmed.
Where xx is equivalent to up_v_incr or up_h_incr and yy is
the fraction of the result in
1
100
.
This is the value for programming the increment correction
values up_v_corr and up_h_corr.
Example: XGA
→
SXGA
Horizontal:
This means up_h_incr = 80 and up_h_corr = 0.
Vertical:
This means up_v_incr = 85 and up_v_corr = 33.
incr
number_of_input_pixels
number_of_output_pixels
64
xx.yy
=
×
=
1280
1024
64
×
51.20
=
1024
768
64
×
48.00
=
incr
number_of_input_pixels
64
xx.yy
=
×
=
1024
1280
64
×
80.00
=
768
1024
64
×
85.33
=
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相關(guān)代理商/技術(shù)參數(shù) |
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