參數(shù)資料
型號(hào)： SAA6721E
廠商： NXP SEMICONDUCTORS
元件分類： 圖形處理器
英文描述： SXGA RGB to TFT graphics engine(XGA RGB 到 TFT圖形引擎)
中文描述： GRAPHICS PROCESSOR, PBGA292
封裝： 27 X 27 MM, 1.75 MM HEIGHT, PLASTIC, SOT-489-1, BGA-292
文件頁(yè)數(shù)： 47/72頁(yè)
文件大小： 360K
代理商： SAA6721E
1999 May 11
47
Philips Semiconductors
Preliminary specification
SXGA RGB to TFT graphics engine
SAA6721E
8.3.4
G
AIN CORRECTION PULSE GENERATION
The GAINC signal is the delayed horizontal sync pulse (VHS). It is delayed with respect to half the dot clock. The first
edge of VHS is delayed by gainc_on_delay and the second edge by gainc_off_delay (see Fig.14). The polarity is
programmed by gainc_pol.
Fig.14 Gain adjustment and clamp pulse generation.
handbook, full pagewidth
MHB254
RGB data
GAINC
CLAMP
gainc_off_delay
gainc_on_delay
clamp_on
clamp_off
8.3.5
YUV
DATA SAMPLING
In YUV mode the input interface receives digital YUV
encoded video data from an external video decoder.
The video data can be in 4 : 4 : 4, 4 : 2 : 2, 4 : 1 : 1, or
YUV 4 : 2 : 2 with CCIR 656 codes. For the 4 : 4 : 4,
4 : 2 : 2, and 4 : 1 : 1 formats the reference signals VVS
and VHS must be considered to identify the frames.
The polarity of these signals is programmable with vs_pol
and hs_pol. The region of valid video data and the start
point for the UV sequence is defined by HREF applied at
pin VPD6.
External reference signals are needed for sampling the
YUV 4 : 4 : 4, 4 : 2 : 2 and 4 : 1 : 1 data. If CCIR 656 data
is to be sampled, all external reference signals are
ignored, because their information is coded into the data
stream. All information about active video, blanking and
field ID is taken from the CCIR 656 codes. The selection of
the input format is done by yuv_input_mode as shown in
Table 11.
Table 11
YUV input modes
Data sampling occurs in relation to horizontal and vertical
offset counters, and horizontal and vertical length
counters. They are the same as for programming the RGB
input, v_offset, h_offset, v_length, and h_length. All offset
and length values are relative to the whole frame, and not
to odd or even fields (see Fig.15).
yuv_input_mode[1 and 0]
DESCRIPTION
0
YUV 4 : 2 : 2 with
CCIR 656 codes
YUV 4 : 1 : 1
YUV 4 : 2 : 2
YUV 4 : 4 : 4
1
2
3
相關(guān)PDF資料
PDF描述
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