參數(shù)資料
型號: SAA6721E
廠商: NXP SEMICONDUCTORS
元件分類: 圖形處理器
英文描述: SXGA RGB to TFT graphics engine(XGA RGB 到 TFT圖形引擎)
中文描述: GRAPHICS PROCESSOR, PBGA292
封裝: 27 X 27 MM, 1.75 MM HEIGHT, PLASTIC, SOT-489-1, BGA-292
文件頁數(shù): 34/72頁
文件大小: 360K
代理商: SAA6721E
1999 May 11
34
Philips Semiconductors
Preliminary specification
SXGA RGB to TFT graphics engine
SAA6721E
Colour correction
P
ROGRAMMING SELECTOR
,
ACTIVATION
Colour correction activation
Straight colour processing
Colour substitution enabled
Blue component programming
Red component correction colour writing disabled
Red component correction colour writing enabled
Green component programming
Red component correction colour writing disabled
Red component correction colour writing enabled
Red component programming
Red component correction colour writing disabled
Red component correction colour writing enabled
47
W
D0
logic 0
logic 1
D1
logic 0
logic 1
D2
logic 0
logic 1
D3
logic 0
logic 1
C
OLOUR INDEX FOR LOOK
-
UP TABLE WRITING
Colour component look-up table index
48
W
D7 to D0
C
OLOUR VALUE FOR LOOK
-
UP TABLE WRITING
Colour component substitution value
49
W
D7 to D0
Memory interface/de-interlacing unit
G
ENERAL CONFIGURATION
De-interlacing mode
No de-interlacing
De-interlacing without filtering
De-interlacing with spatial filtering
De-interlacing with temporal filtering
External memory data bus width
32 bits (two 16-bit channels)
48 bits (three 16-bit channels)
64 bits (four 16-bit channels)
do not use
Internal data path width
RGB and YUV 4 : 4 : 4 processing
YUV 4 : 2 : 2, YUV 4 : 1 : 1 and CCIR 656 processing
50
W
D1 and D0
D1 = 0 and D0 = 0
D1 = 0 and D0 = 1
D1 = 1 and D0 = 0
D1 = 1 and D0 = 1
D3 and D2
D3 = 0 and D2 = 0
D3 = 0 and D2 = 1
D3 = 1 and D2 = 0
D3 = 1 and D2 = 1
D4
logic 0
logic 1
A
CCESS BURST LENGTH
Number of bursts per read/write access to SDRAM
51
W
D3 to D0
SDRAM
BURST LENGTH
SDRAM burst length
SDRAM initialization code for burst length
52
W
D3 to D0
D6 to D4
NAME
SUBADDRESS
R/W
DATA
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