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參數(shù)資料
| 型號： | S71WS512N80BFIZZ0 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP）的閃存和移動存儲芯片的CMOS 1.8伏特 |
| 文件頁數(shù)： | 65/142頁 |
| 文件大?。?/td> | 1996K |
| 代理商： | S71WS512N80BFIZZ0 |
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June 28, 2004 S71WS512NE0BFWZZ_00_A1
S29WSxxxN MirrorBit Flash Family For Multi-chip Products (MCP)
65
A d v a n c e I n f o r m a t i o n
Volatile Sector Protection Command Set
The Volatile Sector Protection Command Set permits the user to set the Dynamic
Protection Bit (DYB), clear the Dynamic Protection Bit (DYB), and read the logic
state of the Dynamic Protection Bit (DYB).
The
Volatile Sector Protection Command Set Entry
command sequence
must be issued prior to any of the following commands to enable proper com-
mand execution.
DYB Set Command
DYB Clear Command
DYB Status Read Command
Note that issuing the
Volatile Sector Protection Command Set Entry
com-
mand disables reads and writes for the bank selected with the command. Reads
within that bank, will return the DYB status for that sector. Writes within that
bank, will set the DYB for that sector. Reads for other banks excluding that bank
are allowed, writes are not allowed. All Reads must be performed using the Asyn-
chronous mode.
The DYB Set/Clear command is used to set or clear a DYB for a given sector. The
high order address bits (A23–A14 for the WS256N) are issued at the same time
as the code 00h or 01h on DQ7-DQ0. All other DQ data bus pins are ignored dur-
ing the data write cycle. The DYBs are modifiable at any time, regardless of the
state of the PPB or PPB Lock Bit. The DYBs are cleared at power-up or hardware
reset.
The programming state of the DYB for a given sector can be verified by writing a
DYB Status Read Command to the device.
The
Volatile Sector Protection Command Set Exit
command must be issued
after the execution of the commands listed previously to reset the device to read
mode.
Note that issuing the
Volatile Sector Protection Command Set Exit
command
re-enables reads and writes for Bank 0.
SecSi Sector Entry Command
The SecSi Sector Entry Command allows the following commands to be executed
Read from SecSi Sector
Program to SecSi Sector
Sector 0 is remapped from memory array to SecSi Sector array. Reads can be
performed using the Asynchronous or Synchronous mode. Burst mode reads
within SecSi Sector will wrap from address FFh back to address 00h. Reads out-
side of sector 0 will return memory array data. Continuous burst read past the
maximum address is undefined.
Simultaneous operations are allowed except for Bank 0. Once the SecSi Sector
Entry Command is issued, the SecSi Sector Exit command has to be issued to exit
SecSi Sector Mode.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71WS512N80BFIZZ2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFIZZ3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFWZZ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFWZZ2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFWZZ3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
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