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參數(shù)資料
| 型號(hào)： | S71GL512NB0 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-chip Product (MCP) |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP） |
| 文件頁(yè)數(shù)： | 69/147頁(yè) |
| 文件大小： | 1655K |
| 代理商： | S71GL512NB0 |
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June 14, 2004 S29GLxxxN_00_A4
S29GLxxxN MirrorBit
TM
Flash Family
69
A d v a n c e I n f o r m a t i o n
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A
max
–A16 uniquely select any sector.
WBL = Write Buffer Location. The address must be within the same write buffer page as PA.
WC = Word Count is the number of write buffer locations to load minus 1.
PWD = Password
PWD
x
= Password word0, word1, word2, word3. word 4, word 5, word 6, and word 7.
DATA = Lock Register Contents: PD(0) = Secured Silicon Sector Protection Bit, PD(1) = Persistent Protection Mode Lock Bit, PD(2)
= Password Protection Mode Lock Bit.
Notes:
1. See
Table 1
for description of bus operations.
2. All values are in hexadecimal.
3. Except for the read cycle, and the 4th, 5th, and 6th cycle of the autoselect command sequence, all bus cycles are write
cycles.
4. Data bits DQ15-DQ8 are don't cares for unlock and command cycles.
5. Address bits A
MAX
:A16 are don't cares for unlock and command cycles, unless SA or PA required. (A
MAX
is the Highest
Address pin.).
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if DQ5 goes high
(while the device is providing status data).
8. The fourth, fifth, and sixth cycle of the autoselect command sequence is a read cycle.
9. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more
information. This is same as PPB Status Read except that the protect and unprotect statuses are inverted here.
10. The data value for DQ7 is “1” for a serialized and protected OTP region and “0” for an unserialized and unprotected Secured
Silicon Sector region. See “Secured Silicon Sector Flash Memory Region” for more information. For Am29LVxxxMH: XX18h/
18h = Not Factory Locked. XX98h/98h = Factory Locked. For Am29LVxxxML: XX08h/08h = Not Factory Locked. XX88h/88h
= Factory Locked.
11. Command is valid when device is ready to read array data or when device is in autoselect mode.
12. The Unlock-Bypass command is required prior to the Unlock-Bypass-Program command.
13. The Unlock-Bypass-Reset command is required to return to reading array data when the device is in the unlock bypass
mode.
14. The system may read and program/program suspend in non-erasing sectors, or enter the autoselect mode, when in the
Erase Suspend mode. The Erase Suspend command is valid only during a sector erase operation.
15. The Erase Resume/Program Resume command is valid only during the Erase Suspend/Program Suspend modes.
16. Issue this command sequence to return to READ mode after detecting device is in a Write-to-Buffer-Abort state. NOTE: the
full command sequence is required if resetting out of ABORT while using Unlock Bypass Mode.
17. S29GL512NH/L = 2223h/23h, 220h/01h; S29GL256NH/L = 2222h/22h, 2201h/01h; S29GL128NH/L = 2221h/21h, 2201h/
01h.
18. The Exit command returns the device to reading the array.
19. Note that the password portion can be entered or read in any order as long as the entire 64-bit password is entered or read.
20. For PWDx, only one portion of the password can be programmed per each “A0” command.
21. The All PPB Erase command embeds programming of all PPB bits before erasure.
22. All Lock Register bits are one-time programmable. Note that the program state = “0” and the erase state = “1”. Also note
that of both the Persistent Protection Mode Lock Bit and the Password Protection Mode Lock Bit cannot be programmed at the
same time or the Lock Register Bits Program operation will abort and return the device to read mode. Lock Register bits that
are reserved for future use will default to “1's”. The Lock Register is shipped out as “FFFF's” before Lock Register Bit program
execution.
23. If any of the Entry command was initiated, an Exit command must be issued to reset the device into read mode. Otherwise
the device will hang.
24. If ACC = V
HH
, sector protection will match when ACC = V
IH
Protected State = “00h”, Unprotected State = “01h”.
Write Operation Status
The device provides several bits to determine the status of a program or erase
operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 19 and the following subsec-
tions describe the function of these bits. DQ7 and DQ6 each offer a method for
determining whether a program or erase operation is complete or in progress.
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| S71GS256NC0BFWAK0 | 128N based MCPs |
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相關(guān)代理商/技術(shù)參數(shù) |
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| S71GL512NC0 | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Stacked Multi-chip Product (MCP) |
| S71GL-N | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71GL-N_08 | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71GLXXXNC0 | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Stacked Multi-chip Product (MCP) |
| S71GS128NB0 | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:128N based MCPs |
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