參數(shù)資料
型號: S71GL512NB0
廠商: Spansion Inc.
英文描述: Stacked Multi-chip Product (MCP)
中文描述: 堆疊式多芯片產(chǎn)品(MCP)
文件頁數(shù): 135/147頁
文件大小: 1655K
代理商: S71GL512NB0
May 4, 2004 pSRAM_Type07_13_A0
pSRAM Type 7
135
A d v a n c e I n f o r m a t i o n
AC Characteristics
Power Down Parameters
Notes:
1. Applicable also to power-up.
2. Applicable when 4M and 8M Partial mode is programmed.
Other Timing Parameters
Notes:
1. Some data might be written into any address location if t
CHWX
(min) is not satisfied.
2. The Input Transition Time (t
T
) at AC testing is 5ns as shown in below. If actual tT is longer than 5ns, it may violate AC
specification of some timing parameters.
Parameter
Symbol
16M
32M
64M
Unit
Note
Min.
Max.
Min.
Max.
Min.
Max.
CE2 Low Setup Time for Power Down Entry
t
CSP
10
10
10
ns
CE2 Low Hold Time after Power Down Entry
t
C2LP
80
65
65
ns
CE1# High Hold Time following CE2 High after Power
Down Exit [SLEEP mode only]
t
CHH
300
300
300
μ
s
1
CE1# High Hold Time following CE2 High after Power
Down Exit [not in SLEEP mode]
t
CHHP
N/A
1
1
μ
s
2
CE1# High Setup Time following CE2 High after
Power Down Exit
t
CHS
0
0
0
ns
1
Parameter
Symbol
16M
32M
64M
Unit
Note
Min.
Max.
Min.
Max.
Min.
Max.
CE1# High to OE# Invalid Time
for Standby Entry
t
CHOX
10
10
10
ns
CE1# High to WE# Invalid
Time for Standby Entry
t
CHWX
10
10
10
ns
1
CE2 Low Hold Time after
Power-up
t
C2LH
N/A
50
50
μ
s
CE1# High Hold Time following
CE2 High after Power-up
t
CHH
300
300
300
μ
s
Input Transition Time
t
T
1
25
1
25
1
25
ns
2
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