參數(shù)資料
型號(hào): S6D0110
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 132 RGB Source & 176 Gate Driver With Internal GRAM FOR 65,536 Colors TFT-LCD
中文描述: 132的RGB源
文件頁(yè)數(shù): 75/108頁(yè)
文件大?。?/td> 595K
代理商: S6D0110
S6D0110 132 RGB SOURCE & 176 GATE DRIVER WITH INTERNAL RAM FOR 65K COLORS TFT-LCD
Preliminary
75
8. Read/Write mode 4: AM =1, LG2-0 = 100/101
This mode is used when the data is vertically written by comparing the original data and the set value of the
compare register (CP15–0). It reads the display data (original data), which has already been written in the GRAM,
compares the original data and the set value of the compare register in byte units, and writes the data sent from
the microcomputer to the GRAM only when the result of the compare operation satisfies the condition. This mode
reads the data during the same access-pulse width (68-system: enabled high level, 80-system: RD* low level) as
the write operation since reading the original data does not latch the read data into the microcomputer but
temporarily holds it in the read-data latch. However, the bus cycle requires the same time as the read operation.
The write-data mask function (WM15–0) is also enabled in these operations. After writing, the address counter
(AC) automatically increments by 256, and automatically jumps to the upper-right edge (I/D = 1) or upper-left edge
(I/D = 0) following the I/D bit after it has reached the lower edge of the GRAM.
Operation Examples:
1) I/D = “1”, AM = “1”, LG2-0 = “101”
2) CP15-0 = “2860”H
3) WM15-0 = “0000”H
4) AC = “0000”H
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Write data mask:
WM15
WM0
Compare register:
0
0
1
0
1
0
0
0
0
1
1
0
0
0
0
0
CP15
CP0
0
0
1
0
1
0
0
0
0
1
1
0
0
0
0
0
Read data (1):
Read data (2):
DB15
DB0
DB15
DB0
(Matched)
(Unmatched)
C
C
Compare
operation
Compare
operation
Conditional
replacement
Conditional
replacement
Replacement
1
0
1
1
1
1
0
0
0
1
1
0
0
0
0
0
R
Write data (1):
R
1
0
1
1
1
1
0
0
0
1
1
0
0
0
0
0
1
1
0
0
0
0
1
1
1
0
0
0
0
0
0
0
Write data (2):
0
0
1
0
1
0
0
0
0
1
1
0
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
1
1
1
1
1
“0000”H
“0100”H
“AF00”H
Write data (1)
Write data (2)
GRAM
NOTE: 1. The bits in the GRAM, * ‘s, are not changed.
2. After writing to address “AF00”H, the AC jumps to “0001”H
“0000”H
“0001”H
1
0
1
1
1
1
0
0
0
1
1
0
0
0
0
0
0
0
1
0
1
0
0
0
0
1
1
0
0
0
0
0
Figure 34. Writing operation of read/write mode 4
相關(guān)PDF資料
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