參數(shù)資料
型號(hào): S6D0110
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 132 RGB Source & 176 Gate Driver With Internal GRAM FOR 65,536 Colors TFT-LCD
中文描述: 132的RGB源
文件頁(yè)數(shù): 42/108頁(yè)
文件大?。?/td> 595K
代理商: S6D0110
132 RGB SOURCE & 176 GATE DRIVER WITH INTERNAL RAM FOR 65K COLORS TFT-LCD
S6D0110
Preliminary
42
REV:
Displays all character and graphics display sections with reversal when REV = 1. For details, see the
Reversed Display Function section. Since the grayscale level can be reversed, display of the same data is enabled
on normally white and normally black panels.
1) Combination with the partial display
Source output level
Non-display area
PT1-0=(1,0)
Vcom=L
Display data
PT1-0=(0,1)
Vcom=L
PT1-0=(1,1)
Vcom=L
REV
GRAM
data
Vcom=L
V63
:
V0
V0
:
V63
Vcom=H
V0
:
V63
V63
:
V0
Vcom=H
Vcom=H
Vcom=H
0
16’h0000
:
16’hFFFF
16’h0000
:
16’hFFFF
V63
V0
VSS
VSS
Hi-z
Hi-z
1
V63
V0
VSS
VSS
Hi-z
Hi-z
2) Combination with the D1-0
Source output level
D1-0=(1,0)
Vcom=L
Vcom=H
D1-0=(1,1)
Vcom=L
V63
:
V0
V0
:
V63
D1-0=(0,1)
Vcom=L
D1-0=(0,0)
Vcom=L
REV
GRAM
data
16’h0000
:
16’hFFFF
16’h0000
:
16’hFFFF
Vcom=H
V0
:
V63
V63
:
V0
Vcom=H
Vcom=H
0
V63
V0
VSS
VSS
VSS
VSS
1
V63
V0
VSS
VSS
VSS
VSS
D1–0:
Display is on when D1 = 1 and off when D1 = 0. When off, the display data remains in the GRAM, and can be
displayed instantly by setting D1 = 1. When D1 is 0, the display is off with the entire source outputs set to the VSS
level. Because of this, the S6D0110 can control the charging current for the LCD with AC driving. Control the display
on/off while control GON and DTE. For details, see the Instruction Set Up Flow.
When D1–0 = 01, the internal display of the S6D0110 is performed although the display is off. When D1-0 = 00, the
internal display operation halts and the display is off.
D1
D0
Source output
S6D0110 internal display operation
Master/slave signal (CL1, FLM, M,
DISPTMG)
Halt
Operate
Operate
Operate
0
0
1
1
0
1
0
1
VSS
VSS
Halt
Operate
Operate
Operate
Unlit display
Display
Notes:
1. Writing from the microcomputer to the GRAM is independent from D1–0.
2. In sleep and standby mode, D1–0 = 00. However, the register contents of D1–0 are not modified.
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