參數(shù)資料
型號: S6D0110
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 132 RGB Source & 176 Gate Driver With Internal GRAM FOR 65,536 Colors TFT-LCD
中文描述: 132的RGB源
文件頁數(shù): 56/108頁
文件大?。?/td> 595K
代理商: S6D0110
132 RGB SOURCE & 176 GATE DRIVER WITH INTERNAL RAM FOR 65K COLORS TFT-LCD
S6D0110
Preliminary
56
8-BIT BUS INTERFACE
Setting the IM2/1/0 (interface mode) to the VSS/VSS/VDD3 level allows 68-system E-clock-synchronized 8-bit
parallel data transfer using pins DB15–DB8. Setting the IM2/1/0 to the VSS/VDD3/VDD3 level allows 80-system 8-
bit parallel data transfer. The 16-bit instructions and RAM data are divided into upper/lower eight bits and the
transfer starts from the upper eight bits. Fix unused pins DB7–DB0 to the VDD3 or VSS level. Note that the upper
bytes must also be written when the index register is written.
MPU
CSn
A1
/WR
/RD
D7-D0
S6D0110
CSB
RS
/WR
/RD
DB15-DB8
DB7-DB0
8
8
Figure 18. Interface to 8-bit microcomputer
Note:
The S6D0110 supports the transfer synchronization function, which resets the upper/lower counter to count
upper/lower 8-bit data transfer in the 8-bit bus interface. Noise causing transfer mismatch between the eight upper
and lower bits can be corrected by a reset triggered by consecutively writing a 00H instruction four times. The next
transfer starts from the upper eight bits. Executing synchronization function periodically can recover any runaway in
the display system
“00”H
“00”H
“00”H
“00”H
Upper or
Lower
Upper
Lower
(1)
(2)
(3)
(4)
8-bit transfer synchronization
RS
R/W
E
DB15
to
DB8
Figure 19. 8-bit transfer synchronization
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