參數(shù)資料
型號: S29PL256N65FAW002
廠商: Spansion Inc.
英文描述: 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
中文描述: 256/128/128字節(jié)(16/8/8 M中的x 16位),3.0伏的CMOS只同步讀/寫,頁模式閃存
文件頁數(shù): 38/85頁
文件大?。?/td> 940K
代理商: S29PL256N65FAW002
36
S29PL-N MirrorBit Flash Family
S29PL-N_00_A4 November 23, 2005
P r e l i m i n a r y
Bypass mode, the full 3-cycle RESET command sequence must be used to reset the device. Re-
moving V
HH
from the ACC input, upon completion of the embedded program or erase operation,
returns the device to normal operation.
Sectors must be unlocked prior to raising WP#/ACC to V
HH
.
The WP#/ACC must not be at V
HH
for operations other than accelerated programming and
accelerated chip erase, or device damage can result.
Set the ACC pin at V
CC
when accelerated programming not in use.
7.4.8 Unlock Bypass
The device features an Unlock Bypass mode to facilitate faster word programming. Once the de-
vice enters the Unlock Bypass mode, only two write cycles are required to program data, instead
of the normal four cycles.
This mode dispenses with the initial two unlock cycles required in the standard program command
sequence, resulting in faster total programming time.
Table 12.1, Memory Array Commands
shows the requirements for the unlock bypass command sequences.
During the unlock bypass mode, only the Read, Unlock Bypass Program and Unlock Bypass Reset
commands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock
bypass reset command sequence. The first cycle must contain the bank address and the data 90h.
The second cycle need only contain the data 00h. The bank then returns to the read mode.
The following are C source code examples of using the unlock bypass entry, program, and exit
functions. Refer to the
Spansion Low Level Driver User’s Guide
(available soon on
www.amd.com
and
www.fujitsu.com
) for general information on Spansion Flash memory software development
guidelines.
/* Example: Unlock Bypass Entry Command */
*((UINT16 *)bank_addr + 0x555) = 0x00AA; /* write unlock cycle 1 */
*((UINT16 *)bank_addr + 0x2AA) = 0x0055; /* write unlock cycle 2 */
*((UINT16 *)bank_addr + 0x555) = 0x0020; /* write unlock bypass command */
/* At this point, programming only takes two write cycles. */
/* Once you enter Unlock Bypass Mode, do a series of like */
/* operations (programming or sector erase) and then exit */
/* Unlock Bypass Mode before beginning a different type of */
/* operations. */
Software Functions and Sample Code
Table 7.15 Unlock Bypass Entry
(LLD Function = lld_ UnlockBypassEntryCmd)
Cycle
Description
Operation
Word Address
Data
1
Unlock
Write
Base + 555h
00AAh
2
Unlock
Write
Base + 2AAh
0055h
3
Entry Command
Write
Base + 555h
0020h
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29PL256N65FAW003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
S29PL256N65FAWW00 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
S29PL256N65FAWW02 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
S29PL256N65FAWW03 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
S29PL256N65FFI000 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory