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參數(shù)資料
| 型號： | S2065 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | Quad Serial Backplane Device with Dual I/O(帶雙傳送接收串行I/O的四收發(fā)器) |
| 中文描述： | 四串行設備，配有雙背板的I / O（帶雙傳送接收串行的I / O的四收發(fā)器） |
| 文件頁數(shù)： | 6/37頁 |
| 文件大小： | 381K |
| 代理商： | S2065 |
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6
S2065
QUAD SERIAL BACKPLANE DEVICE WITH DUAL I/O
October 13, 2000 / Revision G
TRANSMITTER DESCRIPTION
The transmitter section of the S2065 contains a
single PLL which is used to generate the serial rate
transmit clock for all transmitters. Four channels are
provided with a variety of options regarding input
clocking and loopback. The transmitters can operate
in the range of 770 MHz to 1.3 GHz, 10 or 20 times
the reference clock frequency. The transmitter func-
tions are shown schematically in Figure 4.
Data Input
The S2065 has been designed to simplify the parallel
interface data transfer and provide the utmost in flex-
ibility regarding clocking of parallel data. Prior, or less
sophisticated, implementations of this function have
either forced the user to synchronize transmit data to
the reference clock or to provide the output clock as a
reference to the PLL, resulting in increased jitter at
the serial interface. The S2065 incorporates a unique
input structure, which enables the user to provide a
“clean” reference source for the PLL and to accept a
separate external clock which is used exclusively to
reliably clock data into the device.
The S2065 also provides a system clock output,
TCLKO, which is derived from the internal VCO. The
frequency of this output is constant at the parallel
word rate, 1/10 the serial data rate, regardless of
whether the reference is provided at 1/10 or 1/20 the
serial data rate. This clock can be used by upstream
circuitry as a system clock.
Data is input to each channel of the S2065 nominally
as a 10-bit wide word. This consists of 8-bits of user
data, KGEN, and SOF. An input FIFO and a clock
input, TCLKx, are provided for each channel of the
S2065. The device can operate in two different
modes. In CHANNEL LOCK mode all four bytes of
the input data are clocked into their respective FIFOs
using a common clock. The S2065 can be configured
to use either the TCLKA (TCLK MODE) input or the
REFCLK input (REFCLK MODE). In NORMAL mode,
each byte of data is clocked into its FIFO with the
TCLKx provided with each byte. A TTL clock (TCLKO)
at the parallel data rate is provided by the S2065 for
use by upstream circuitry. The TCLKO is derived from
the transmit VCO. Table 1 provides a summary of the
input modes for the S2065.
Operation in the TCLK MODE makes it easier for
users to meet the relatively narrow setup and hold
time window required by the parallel 10-bit interface.
The TCLK signal is used to clock the data into an
internal holding register and the S2065 synchronizes
its internal data flow to ensure stable operation. The
TCLK is not used as a reference to the VCO. This
facilitates the provision of a clean reference clock
resulting in minimum jitter on the serial output. The
TCLK must be frequency locked to REFCLK, but
may have an arbitrary but fixed phase relationship.
Adjustment of internal timing of the S2065 is per-
formed during reset. Once synchronized, the S2065
can tolerate up to
±
3ns of phase drift between TCLK
and REFCLK.
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Table 1. Input Modes
Note that internal synchronization of FIFOs is performed upon de-assertion of RESET.
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| S2065A | 制造商:AppliedMicro 功能描述:Backplane Transceiver 208-Pin TBGA |
| S2065J | 功能描述:SCR 65A 200V RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復關閉狀態(tài)電壓 VDRM:600 V 關閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| S2065J | 制造商:Littelfuse 功能描述:Thyristor Thyristor/Triac Type:SCR |
| S2065J_ | 功能描述:SCR - Use 576-S2065J RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復關閉狀態(tài)電壓 VDRM:600 V 關閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| S2065JTP | 功能描述:SCR SCR 200V 65A Iso RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復關閉狀態(tài)電壓 VDRM:600 V 關閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
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