參數(shù)資料
型號: S2070
廠商: Applied Micro Circuits Corp.
英文描述: Fibre Channel and GigaBit Ethernet Transceiver(帶片上鎖相環(huán)的光纖通道/千兆位以太網(wǎng)收發(fā)器)
中文描述: 光纖通道和千兆以太網(wǎng)收發(fā)器(帶片上鎖相環(huán)的光纖通道/千兆位以太網(wǎng)收發(fā)器)
文件頁數(shù): 1/20頁
文件大小: 498K
代理商: S2070
1
S2070
S2070
FIBRE CHANNEL/GIGABIT ETHERNET TRANSCEIVER
March 7, 2001 / Revision G
DEVICE
SPECIFICATION
FEATURES
1062 Mbps (Fibre Channel) line rates
1250 Mbps (Gigabit Ethernet) line rates
Half and full VCO output rates
Functionally compliant to IEEE 802.3z Gigabit
Ethernet Specification and the ANSI X3T11
Fibre Channel Specification
Transmitter incorporating phase-locked loop
(PLL) clock synthesis from low speed reference
Receiver PLL provides clock and data recovery
10-bit parallel TTL compatible interface
Low-jitter serial LVPECL compatible interface
Local loopback
Single +3.3 V supply, 620 mW power dissipation
64 PQFP package
Continuous downstream clocking from receiver
Drives 30 m of Twinax cable directly
APPLICATIONS
Workstation
Frame buffer
Switched networks
Data broadcast environments
Proprietary extended backplanes
GENERAL DESCRIPTION
The S2070 transmitter and receiver chip facilitates
high speed serial transmission of data over fiber op-
tic, coax, or twinax interfaces. The device conforms
to the requirements of the IEEE 802.3z Gigabit
Ethernet Specification and the ANSI X3T11 Fibre
Channel specification, and runs at 1062 Mbps or
1250 Mbps data rates with an associated 10-bit data
word.
The chip provides parallel-to-serial and serial-to-par-
allel conversion, clock generation/recovery, and
framing for block encoded data. The on-chip transmit
PLL synthesizes the high-speed clock from a low-
speed reference. The on-chip receive PLL performs
clock recovery and data re-timing on the serial bit
stream. The transmitter and receiver each support
differential LVPECL compatible I/O for copper or fi-
ber optic component interfaces with excellent signal
integrity. Local loopback mode allows for system di-
agnostics. The chip requires a +3.3 V power supply
and dissipates approximately 620 mW under typical
conditions.
The S2070 can be used for a variety of applications
including Fibre Channel, serial backplanes, and pro-
prietary point-to-point links. Figure 1 shows a typical
configuration incorporating the chip.
Figure 1. System Block Diagram
S2070
Gigabit
Ethernet/
Fibre
Channel
Controller
Optical
Tx
Optical
Rx
Optical
Tx
Optical
Rx
S2070
Gigabit
Ethernet/
Fibre
Channel
Controller
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