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參數(shù)資料
| 型號(hào)： | S2071 |
| 廠商： | APPLIEDMICRO INC |
| 元件分類(lèi)： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Four Port Bypass for FC-AL(用于FC-AL的四端口旁路電路) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁(yè)數(shù)： | 1/11頁(yè) |
| 文件大?。?/td> | 114K |
| 代理商： | S2071 |
1
FOUR PORT BYPASS FOR FC-AL
S2071
S2071
January 6, 2000 / Revision C
FEATURES
ANSI X3T11 Fibre Channel Compatible
Four Port Bypass Circuits
Suitable for both Coaxial and Optical Link
Nominal deterministic Jitter
±
10ps
Low Power Operation 0.73 W Typical
44 Pin PQFP Package
3.3V Supply
Micropower Bipolar Technology
APPLICATIONS
RAID
JBOD
FC-AL Nodes
Figure 1. S2071 Functional Block Diagram
DEVICE
SPECIFICATION
GENERAL DESCRIPTION
The Four Port Bypass for FC-AL Circuit is used in
full-speed (1.0625 Gbps) Disk Arrays. It contains
four port bypass circuits. The S2071 may be used to
implement a single chip Arbitrated Loop Port Bypass
Node. The S2071 performs the function of four port
bypass circuits.
FUNCTIONAL DESCRIPTION
The S2071 functional block diagram is shown in Fig-
ure 1. The S2071 performs the function of a Port
Bypass Circuit (PBC) for nodes in a FC-AL system.
The low jitter accumulation of the port bypass path is
essential in these systems.
Jitter Performance
The primary AC parameter of importance is
determinsitic jitter accumulation (data eye degrada-
tion) inserted by the port bypass circuit. The S2071
utilizes high bandwidth, low skew differential circuitry
to provide symmetric rise and fall times and excel-
lent noise immunity.
For arrays of disk drives greater than 4, it is recom-
mended that the S2071 be cascaded with the S2058
(Port Bypass with Repeater) in a ratio of 1:1 to per-
form clock and data retiming. This ensures optimal
jitter performance for the disk array system.
0
1
0
1
0
1
0
1
DDO0 DDI0
EN0
DDO1
DDI1
EN1
DDO2
DDI2
EN2
DDO3 DDI3
EN3
IN
OUT
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