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S2075
S2075
FIBRE CHANNEL BIT STREAM MONITOR WITH REPEATER
May 15, 2000 / Revision A
DEVICE SPECIFICATION
FEATURES
Repeater with parallel monitor function
Selectable parallel input provides local control
of serial bit stream
1062MHz (Fibre Channel) line rates
Half and full VCO output rates
Functionally compliant ANSI X3T11 Fibre
Channel Specification
TTL Bypass Select
Transmitter incorporating phase-locked loop
(PLL) clock synthesis from low speed reference
Repeater PLL provides clock and data recovery
10 bit parallel TTL compatible interface
Low-jitter serial LVPECL compatible interface
Local loopback
Single +3.3V supply, 600 mW power dissipation
64 PQFP package
Continuous downstream clocking from
parallel output
Drives 30m of Twinax cable directly
APPLICATIONS
Storage area network
Workstation
Frame buffer
Figure 1. System Block Diagram
S2075
Local
Controller
Serial Bit Stream
Serial Bit Stream
Parallel
Input
(Transceiver
Mode)
Parallel
Output
(Monitor)
P
Switched networks
Data broadcast environments
Proprietary extended backplanes
GENERAL DESCRIPTION
The S2075 bit stream monitor with repeater facili-
tates high speed serial transmission of data over fi-
ber optic, coax, or twinax interfaces. The device
conforms to the requirements of the ANSI X3T11
Fibre Channel specification, and runs at 1062 Mbps
data rates with an associated 10-bit data word.
The chip provides a repeater function with serial-to-
parallel conversion for monitoring the serial bit
stream. An on-chip PLL performs clock recovery and
data retiming of the serial bit stream. In transceiver
mode, parallel data from the local controller is in-
jected onto the serial bit stream. In this mode, the
transmit PLL synthesizes the high-speed clock from
a low speed reference.
The serial I/O support LVPECL compatible signals
for copper or fiber optic component interfaces with
excellent signal integrity. Local loopback mode al-
lows for system diagnostics. The chip requires a
+3.3V power supply and dissipates 600 mW under
typical conditions.
The S2075 can be used for a variety of applications
including Fibre Channel, serial backplanes, and pro-
prietary point-to-point links. Figure 1 shows a typical
configuration incorporating the chip.