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參數(shù)資料
| 型號： | S2076 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | Quad Fibre Channel Transceiver(四光纖通道收發(fā)器) |
| 中文描述： | 四光纖通道收發(fā)器（四光纖通道收發(fā)器） |
| 文件頁數(shù)： | 1/28頁 |
| 文件大小： | 300K |
| 代理商： | S2076 |
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S2076
S2076
QUAD FIBRE CHANNEL TRANSCEIVER
October 13, 2000 / Revision B
DEVICE
SPECIFICATION
FEATURES
Functionally compliant with ANSI X3T11 Fibre
Channel physical and transmission protocol
standards.
1062 MHz (Fibre Channel) operating rate
- 1/2 Rate Operation
Quad Transmitter incorporating phase-locked
loop (PLL) clock synthesis from low speed
reference
Quad Receiver PLL provides clock and data
recovery
Internally series terminated TTL outputs
Low-jitter serial PECL interface
Local Loopback
Interfaces with coax, twinax, or fiber optics
Single +3.3V supply, 2.3 W Power dissipation
Compact 23mm x 23mm 208 TBGA package
APPLICATIONS
High-speed data communications
Switched networks
Data broadcast environments
Fibre Channel Switches
GENERAL DESCRIPTION
The S2076 quad transmitter and receiver chip is de-
signed to provide four channels of high-speed serial
data transmission over fiber optic or copper interfaces
conforming to the requirements of the ANSI X3T11
Fibre Channel specification. The chip runs at 1062.5
Mbps serial data rate with an associated 10-bit paral-
lel data word. The chip provides four separate trans-
ceivers which can be operated individually at slightly
different frequencies.
Each bi-directional channel provides parallel to serial
and serial to parallel conversion, clock generation
and recovery, and framing. The on-chip transmit PLL
synthesizes the high-speed clock from a low-speed
reference. The on-chip quad receive PLL is used for
clock recovery and data re-timing on the four inde-
pendent data inputs. The transmitter and receiver
each support differential PECL-compatible I/O for
copper or fiber optic component interfaces and pro-
vide excellent signal integrity. Local loopback mode
allows for system diagnostics. The chip requires a
3.3V power supply and dissipates approximately 2.3
watts.
Figure 1 shows the use of the S2064 and S2076 in a
Fibre Channel application. Figure 2 summarizes the
input/output signals of the device. Figures 3 and 4
show the transmit and receive block diagrams, re-
spectively.
Figure 1. Typical Quad Fibre Channel Application
MAC
(ASIC)
S2064
QUAD
FIBRE
CHANNEL
INTERFACE
MAC
(ASIC)
MAC
(ASIC)
MAC
(ASIC)
TO SERIAL BACKPLANE
S2076
FC INTERFACE
SERIAL BP DRIVER
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