
4
S2075
FIBRE CHANNEL BIT STREAM MONITOR WITH REPEATER
May 15, 2000 / Revision A
TRANSMITTER DESCRIPTION
The S2075 accepts 10-bit parallel input data and se-
rializes it for transmission over fiber optic or coaxial
cable media. The chip is fully compatible with the
ANSI X3T11 Fibre Channel standard, and supports
the Fibre Channel data rate of 1062 Mbps. The
S2075 uses a PLL to generate the serial rate trans-
mit clock. The transmitter runs at 10 times the TBC
input clock, and operates in either full rate or half
rate mode. At the full VCO rate the transmitter runs
at 1.062 GHz, while in half rate mode it operates at
531 MHz.
Parallel-to-Serial Conversion
The parallel-to-serial converter takes in 10-bit wide
data from the input latch and converts it to a serial
data stream. Parallel data is latched into the trans-
mitter on the positive going edge of TBC. The data is
then clocked into the serial output shift register. The
shift register is clocked by the internally generated
bit clock which is 10x the TBC input frequency. TX[0]
is transmitted first.
Transmit Byte Clock (TBC)
The Transmit Byte Clock input (TBC) must be sup-
plied from a clock source with 100 ppm tolerance to
assure that the transmitted data meets the Fibre
Channel frequency limits. The internal serial clock is
frequency locked to TBC (106.2 MHz).
TBC may be 53.1 MHz or 106.2 MHz, determined by
the state of the RATEN input. Operating rates are
shown in Table 3.
Transmit Latency
The average transmit latency is 4 byte times.
N
E
T
A
R
t
u
p
)
p
n
r
e
R
a
P
b
M
(
y
c
n
e
u
q
)
H
e
r
F
(
C
B
T
M
t
u
p
p
)
p
t
u
b
b
O
G
(
l
e
R
e
S
0
2
0
1
2
0
1
2
6
0
1
1
5
1
5
1
3
5
Table 3. Operating Rates
REPEATER DESCRIPTION
The S2075 provides serial input/output with a Clock
Recovery Unit (CRU) and a parallel output for moni-
toring of the serial bit stream. The S2075 retimes
incoming serial data, detects whether a valid charac-
ter is present, and outputs both a low jitter serial
data stream, and a 10-bit parallel data stream for
monitoring of the serial data. The S2075 complies
with the minimum jitter tolerance requirements pro-
posed by the Fibre Channel Jitter Working Group.
Jitter Performance
Jitter tolerance is defined as the amplitude of jitter
that causes the clock recovery PLL to violate the
BER specifications. This is specified as Frequency
Dependent, Random, and Deterministic jitter toler-
ance. Frequency Dependent jitter tolerance is de-
fined as the peak-to-peak amplitude of sinusoidal
jitter applied at the input. Figure 3 shows the Fre-
quency Dependent Jitter tolerance mask. Random
jitter tolerance is the amount of jitter with a Gaussian
distribution (noise) that the clock recovery PLL must
tolerate. Deterministic jitter tolerance is the amount
of jitter that is due to non-Gaussian events that the
clock recovery PLL must tolerate.
Figure 3. Frequency Dependent Jitter
Tolerance Mask
f
/25,000
(42.5 KHz)
Cut-off Freq A
f
/1,667
(637 KHz)
Cut-off Freq B
T
1.5
Frequency (Hz)
(KHz) = Cut-off Freq @ 1,0625 Gbps