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參數(shù)資料
| 型號： | S2065 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | Quad Serial Backplane Device with Dual I/O(帶雙傳送接收串行I/O的四收發(fā)器) |
| 中文描述： | 四串行設(shè)備，配有雙背板的I / O（帶雙傳送接收串行的I / O的四收發(fā)器） |
| 文件頁數(shù)： | 15/37頁 |
| 文件大小： | 381K |
| 代理商： | S2065 |
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15
S2065
QUAD SERIAL BACKPLANE DEVICE WITH DUAL I/O
October 13, 2000 / Revision G
8B/10B Decoding
After performing serial-to-parallel conversion, the
S2065 provides 8B/10B decoding of the data. The
received 10-bit codeword is decoded to recover the
original 8-bit data. The decoder also checks for er-
rors and flags, either invalid codeword errors or run-
ning disparity errors by assertion of the ERRx signal.
Error type is determined by examining the EOF out-
put in accordance with Table 8. When more than one
reportable condition occurs simultaneously, reporting
is in accordance with the rank assigned by Table 8.
Data Output
Data is output on the DOUT[0:7] outputs. K-charac-
ters are flagged using the KFLAG signal. The EOF
(with KFLAG) is used to indicate the reception of a
valid K28.5 character. Invalid codewords and decod-
ing errors are indicated on the ERR output. KFLAG,
EOF, and ERR are buffered with the data in the
FIFO to ensure that all outputs are synchronized at
the S2065 outputs. Errors are reported indepen-
dently for each channel in both CHANNEL LOCK
mode and NORMAL mode operation.
The S2065 TTL outputs are optimized to drive 65
line impedances. Internal source matching provides
good performance on unterminated lines of reason-
able length.
Parallel Output Clock Rate
Two output clock modes are supported. When
CMODE is HIGH, a complementary TTL clock at the
data rate is provided on the RCxP/N outputs. Data
should be clocked on the rising edge of RCxP. When
CMODE is LOW, a complementary TTL clock at 1/2
the data rate is provided. Data should be latched on
the rising edge of RCxP and the rising edge of
RCxN.
The S2065 will operate properly when multiple K28.5
characters are received. Byte alignment is achieved
after the first K28.5 is received. The RCxP/N clock
operates without glitches or loss of cycles.
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Table 7. Output Clock Modes
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S2065A | 制造商:AppliedMicro 功能描述:Backplane Transceiver 208-Pin TBGA |
| S2065J | 功能描述:SCR 65A 200V RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| S2065J | 制造商:Littelfuse 功能描述:Thyristor Thyristor/Triac Type:SCR |
| S2065J_ | 功能描述:SCR - Use 576-S2065J RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| S2065JTP | 功能描述:SCR SCR 200V 65A Iso RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
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