參數(shù)資料
型號(hào)： QT0081411TUE
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁(yè)數(shù)： 27/62頁(yè)
文件大?。?/td> 268K
代理商： QT0081411TUE
82C814
912-3000-047
Revision: 1.0
Page 17
January 08, 1998
OPTi
4.7
OPTi docking is based on the CardBus concept: the docking
station can be treated like a CardBus card being plugged into
or removed from the system at any time. The docking inter-
face is fully isolated and allows the host system to recover in
case of problems on the dock.
PCI Docking Station Operation
Windows 98 and NT 5.0 fully supports 82C814 docking.
When using other operating systems, BIOS support software
is required. The rest of this section describes the basics of
the support software needed.
4.7.1
The 82C814 register set follows the Yenta standard; the reg-
isters are virtually the same whether in CardBus mode or in
Docking mode. However, there are two differences from a
programming point of view.
Introduction
A CardBus card can be identified as PCICFG 68h[5:4] =
10. A Docking Station is identified by PCICFG 68h[5:4] =
11.
A CardBus card has only one interrupt, mapped to
PCIRQ0#. A Docking Station has four interrupt pins,
mapped through PCIRQ[3:0]#.
When a docking station is attached to the interface, the
power control state machine of the 82C814 recognizes the
docking station. A docking station is the only valid attachment
to the 82C814 chip.
4.7.2
The docking concept follows the Yenta specification. How-
ever, a more flexible set of registers is available for docking
that allows eight windows instead of the four offered by
Yenta. Either the Yenta window registers (PCICFG 1C-3Bh)
or the docking registers (PCICFG 80-BFh) can be used. The
docking window registers also allow finer control over window
sizes than do the Yenta window registers.
Procedure
4.7.3
The following programming should be performed at system
initialization time, and does not need to be repeated.
Initial Setup
Enable Host Chipset Bus Preemption.
Write SYSCFG
1Eh[3] = 1 on the Viper-N+ and FireStar chipsets.
Establish Status Change Interrupt.
Write PCICFG 4Ch
with the IRQ that should be generated when the dock is
attached or removed. Any available IRQ can be used. On
FireStar, selecting IRQ2 will generate an SMI and IRQ13
will generate an NMI. These selections are not available
on Viper-N+. However, normal IRQs can be programmed
on the Viper-N+ chipset to generate an SMI or NMI if
desired, through the following approach:
1. Use SYSCFG 64h and A4h to select the IRQ to use for
SMI generation.
2. Write SYSCFG 57h[6] = 1 to enable INTRGRP to gener-
ate PMI#6 when the selected IRQ goes active.
3. Write SYSCFG 59h[5:4] = 11 to enable PMI#6 to gener-
ate SMI.
PCICFG 5Fh
-
This register returns the number of retry attempts made.
-
More than 256 retries are indicated by FFh.
-
Used for diagnostic purposes. Read-only.
-
Separate counts are maintained for primary and secondary. Bit 5Eh[3] selects the count being read back.
82C814 Retry Count Readback Register (RO)
Default = 00h
PCICFG 3Eh
Bridge Control Register - Byte 0
Default = 40h
Response to
master abort
on slot
interface:
0 = Ignore
1 = Signal with
target abort
or SERR#
Table 4-4
Write Posting Associated Registers (cont.)
7
6
5
4
3
2
1
0
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