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參數(shù)資料
| 型號： | PowerPC 750 |
| 廠商： | IBM Microeletronics |
| 英文描述： | 32-Bit Embedded Microprocessor(32位精簡指令集嵌入式微處理器) |
| 中文描述： | 32位嵌入式微處理器（32位精簡指令集嵌入式微處理器） |
| 文件頁數(shù)： | 36/46頁 |
| 文件大小： | 610K |
| 代理商： | POWERPC 750 |
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Page 32
Version 2.0
Datasheet
9/30/99
PowerPC 750 SCM RISC Microprocessor
PID8p-750
Preliminary Copy
L2CLKOUTB network could also be used depending on the loading, frequency, and number of SRAMs.
Output Buffer DC Impedance
The PID8p-750 60x and L2 I/O drivers were characterized over process, voltage, and temperature. To mea-
sure Z
0
, an external resistor is connected to the chip pad, either to OV
DD
or GND. Then the value of such
resistor is varied until the pad voltage is OV
DD
/2; see Figure 17, “Driver Impedance Measurement,” below.
The output impedance is actually the average of two components, the resistances of the pull-up and pull-
down devices. When Data is held low, SW1 is closed (SW2 is open), and R
N
is trimmed until Pad = OV
DD
/2. R
N
then becomes the resistance of the pull-down devices. When Data is held high, SW2 is closed (SW1 is open),
and R
P
is trimmed until Pad = OV
DD
/2. R
P
then becomes the resistance of the pull-up devices. With a properly
designed driver R
P
and R
N
are close to each other in value, then Z
0
= (R
P
+ R
N
)/2.
The following table summarizes the impedance a board designer would design to for a typical process. These
values were derived by simulation at 65
°
C. As the process improves, the output impedance will be lower by
several ohms than this typical value.
Figure 17. Driver Impedance Measurement
Impedance Characteristics
V
DD
= 1.9V
DC
, L2OV
DD
=OV
DD
= 3.3V
DC
, T
J
=
65
°
C
Process
60x
L2
Symbol
Unit
Typical
43
38
Z
0
Data
OV
DD
R
N
SW2
SW1
Pad
R
P
GND
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