![](http://datasheet.mmic.net.cn/260000/PI7C7300_datasheet_15942608/PI7C7300_86.png)
PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 86 OF 109
09/25/03 Revision 1.09
Bit
Function
Type
Description
Controls PI7C7300A’s ability to assert P_SERR# when it is unable to
transfer any read data from the target after 2
24
attempts.
0: P_SERR# is asserted if this event occurs and the SERR# enable bit
in the command register is set
1: P_SERR# is not asserted if this event occurs
Reset to 0
Reserved. Returns 0 when read. Reset to 0
6
Delayed Read –
No Data From
Target
R/W
7
Reserved
R/O
14.1.36
SECONDARY CLOCK CONTROL REGISTER – OFFSET 68h
Configuration Register 1
Bit
Function
Type
Description
If either bit is 0, then S1_CLKOUT [0] is enabled.
If both bits are 1, the S1_CLKOUT [0] is disabled.
If either bit is 0, then S1_CLKOUT [1] is enabled.
If both bits are 1, the S1_CLKOUT [1] is disabled.
If either bit is 0, then S1_CLKOUT [2] is enabled.
If both bits are 1, the S1_CLKOUT [2] is disabled.
If either bit is 0, then S1_CLKOUT [3] is enabled.
If both bits are 1, the S1_CLKOUT [3] is disabled.
If either bit is 0, then S1_CLKOUT [4] is enabled.
If both bits are 1, the S1_CLKOUT [4] is disabled.
If either bit is 0, then S1_CLKOUT [5] is enabled.
If both bits are 1, the S1_CLKOUT [5] is disabled.
If either bit is 0, then S1_CLKOUT [6] is enabled.
If both bits are 1, the S1_CLKOUT [6] is disabled.
If either bit is 0, then S1_CLKOUT [7] is enabled.
If both bits are 1, the S1_CLKOUT [7] is disabled.
1:0
Clock 0 disable
R/W
3:2
Clock 1 disable
R/W
5:4
Clock 2 disable
R/W
7:6
Clock 3 disable
R/W
9:8
Clock 4 disable
R/W
11:10
Clock 5 disable
R/W
13:12
Clock 6 disable
R/W
15:14
Clock 7 disable
R/W
Configuration Register 2
Bit
Function
Type
Description
If either bit is 0, then S2_CLKOUT [0] is enabled.
If both bits are 1, the S2_CLKOUT [0] is disabled.
If either bit is 0, then S2_CLKOUT [1] is enabled.
If both bits are 1, the S2_CLKOUT [1] is disabled.
If either bit is 0, then S2_CLKOUT [2] is enabled.
If both bits are 1, the S2_CLKOUT [2] is disabled.
If either bit is 0, then S2_CLKOUT [3] is enabled.
If both bits are 1, the S2_CLKOUT [3] is disabled.
If either bit is 0, then S2_CLKOUT [4] is enabled.
If both bits are 1, the S2_CLKOUT [4] is disabled.
If either bit is 0, then S2_CLKOUT [5] is enabled.
If both bits are 1, the S2_CLKOUT [5] is disabled.
If either bit is 0, then S2_CLKOUT [6] is enabled.
If both bits are 1, the S2_CLKOUT [6] is disabled.
If either bit is 0, then S2_CLKOUT [7] is enabled.
If both bits are 1, the S2_CLKOUT [7] is disabled.
1:0
Clock 0 disable
R/W
3:2
Clock 1 disable
R/W
5:4
Clock 2 disable
R/W
7:6
Clock 3 disable
R/W
9:8
Clock 4 disable
R/W
11:10
Clock 5 disable
R/W
13:12
Clock 6 disable
R/W
15:14
Clock 7 disable
R/W
14.1.37
PORT OPTION REGISTER – OFFSET 74h
Bit
0
Function
Reserved
Type
R/O
Description
Reserved. Returns 0 when read. Reset to 0.