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參數(shù)資料
| 型號： | PI7C7300A |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | 3-PORT PCI-to-PCI BRIDGE |
| 中文描述： | 3端口PCI至PCI橋 |
| 文件頁數(shù)： | 17/109頁 |
| 文件大?。?/td> | 779K |
| 代理商： | PI7C7300A |
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PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 17 OF 109
09/25/03 Revision 1.09
Name
S_CFN#
Pin #
Y2
Type
PIU
Description
Secondary Bus Central Function Control Pin.
When
tied LOW, it enables the internal arbiter. When tied
HIGH, an external arbiter must be used. S1_REQ#[0]
or S2_REQ#[0] is reconfigured to be the secondary bus
grant input, and S1_GNT#[0] or S2_GNT#[0] is
reconfigured to be the secondary bus request output.
3.4
CLOCK SIGNALS
Name
P_CLK
Pin #
V6
Type
PI
Description
Primary Clock Input.
Provides timing for all
transactions on the primary interface.
Secondary Clock Output.
Provides secondary 1
clocks phase synchronous with the P_CLK.
Secondary Clock Output.
Provides secondary 2
clocks phase synchronous with the P_CLK.
S1_CLKOUT
[7:0]
A11, C12, A13,
B14, B15, C16,
A18, A19
T3, T1, P3, N3,
M4, L3, L2, J1
PTS
S2_CLKOUT
[7:0]
PTS
3.5
MISCELLANEOUS SIGNALS
Name
BYPASS
Pin #
Y4
Type
PI
Description
Reserved.
Reserved for future use. Must be tied
HIGH.
Reserved.
Reserved for future use. Must be tied
LOW.
Reserved.
Reserved for future use. Must be tied
LOW.
Full-Scan Test Mode Enable (Active LOW).
Connect HIGH for normal operation.
When SCAN_TM# is active, the ten scan chains will be
enabled. The scan clock is P_CLK. The scan input and
outputs are as follows:
S1_REQ[6], S1_REQ[5], S1_REQ[4], S1_REQ[3],
S1_REQ[2], S2_REQ#[6], S2_REQ#[5], S2_REQ#[4],
S2_REQ#[3], S2_REQ#[2], and S1_GNT#[6],
S1_GNT#[5], S1_GNT#[4], S1_GNT#[3],
S1_GNT#[2], S2_GNT#[6], S2_GNT#[5],
S2_GNT#[4], S2_GNT#[3], S2_GNT#[2]
Full-Scan Enable Control.
SCAN_EN should be tied
LOW in normal mode. When SCAN_EN is LOW, full-
scan is in shift operation if SCAN_TM# is active.
When SCAN_EN is HIGH, full-scan is in parallel
operation if SCAN_TM# is active.
PLL_TM
Y3
PI
S_CLKIN
V5
PI
SCAN_TM#
V4
PI
SCAN_EN
U5
PID
3.6
COMPACT PCI HOT-SWAP SIGNALS
Name
LOO
Pin #
U1
Type
PO
Description
Hot Swap LED
. The output of this pin lights a blue
LED to indicate insertion and removal ready status. If
HS_EN is LOW, pin is S2_GNT#[7].
Hot Swap Switch.
When driven LOW, this signal
indicates that the board ejector handle indicates an
insertion or impending extraction of a board. If HS_EN
is LOW, pin is S2_REQ#[7].
Hot Swap Enable.
To enable Hot Swap Friendly
support, this signal should be pulled HIGH.
HS_SW#
T2
PI
HS_EN
U6
PI
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| PI7C8140A | 2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON |
| PI7C8148B | 2-PORT PCI-to-PCI BRIDGE PLX PC16152 COMPARISON |
| PI7C8150B-33 | PCI Bridge | Asynchronous 2-Port PCI Bridge |
| PI7C8152B | PCI Bridge | Asynchronous 2-Port PCI Bridge |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C7300AEVB-3 | 功能描述:界面開發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| PI7C7300ANA | 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA |
| PI7C7300ANAE | 功能描述:外圍驅(qū)動器與原件 - PCI 3 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C7300ANA-E | 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA |
| PI7C7300DNAE | 功能描述:外圍驅(qū)動器與原件 - PCI PCI -to -PCI Bridge 3 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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