Pentium
OverDrive
PROCESSOR WITH MMX
TECHNOLOGY
E
28
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PRELIMINARY
3.3.2.
TEST AND CONFIGURATION
FEATURES (BIST, FRC, TRISTATE
TEST MODE)
The Pentium OverDrive processor with MMX
technology will execute the Built In Self Test (BIST)
and Tristate Test Mode same as the respective
original Pentium processor. Functional Redundancy
Checking is not supported.
3.3.3.
INITIALIZATION WITH RESET, INIT
AND BIST
The Pentium OverDrive processor with MMX
technology handling of RESET, INIT, and the Built In
Self Test (BIST) is the same as the original Pentium
processors. The register states after RESET, INIT,
and BIST are same as the original Pentium
processors. For further information refer to Section 8
in this datasheet.
3.4.
Instruction Differences
The Pentium OverDrive processor with MMX
technology is 100% compatible with the Pentium
processor (75-200). Two additions have been made.
The 57 instructions that comprise the MMX
Technology Instruction set and the RDPMC (Read
Performance Monitoring Counter) instruction. These
new instructions are an added feature and will not
impact the use of the upgraded system in anyway
unless specifically used.
3.4.1.
MMX TECHNOLOGY EXTENSIONS
TO THE INTEL ARCHITECTURE
Intel’s MMX technology is an extension to the Intel
architecture
which
provides
performance for multimedia and communications
applications. Intel processors that include this
technology are still 100% compatible with all “scalar”
Intel processors. This means that all existing
software that runs on existing Intel processors will
continue to run (without modification) on an Intel
processor that incorporates MMX technology.
for
additional
Intel’s MMX technology uses a SIMD (Single
Instruction, Multiple Data) tecnique to speedup
multimedia
and
communications
processing multiple data elements in parallel. The
MMX instruction set all 57 new opcodes and a new
software
by
64-bit quadword type. The new 64-bit data type holds
packed integer values. These packed integer values
can be 8 bytes, 4 words, or 2 double-words.
The Pentium OverDrive processor with MMX
technology includes the MMX instruction set as
defined by the Intel Architecture MMX
Technology
Programmers Reference Manual
(Order #243007)
and the
Intel Architecture MMX Technology
Developer’s Manual
(Order #243006). Software can
determine that the system has been upgraded to a
Intel Architecture processor that supports MMX
technology via the CPUID instruction.
3.4.2.
RDPMC (READ PERFORMANCE
MONITORING COUNTER)
RDPMC will enable the user to only READ the
performance monitoring counters.
3.5.
CPUID
The CPUID instruction allows software to determine
the type and features of the microprocessor. When
executing the CPUID instruction the Pentium
OverDrive processor with MMX technology behaves
like the original Pentium processors:
If the value in EAX is ‘0’ then the 12-byte ASCII
string “GenuineIntel” (little endian) is returned in
EBX, EDX, and ECX. Also, a ‘1’ is returned in
EAX.
If the value in EAX is ‘1’ then the processor
version is returned in EAX and the processor
capabilities are returned in EDX. The values of
EAX and EDX for the Pentium
OverDrive
processor with MMX technology are given
below.
If the value in EAX is neither ‘0’ nor ‘1’, Pentium
OverDrive processor with MMX technology
writes ‘0’ to all registers or is undefined.
The stepping field has the same format as the
original Pentium processor and will be the same for
the Pentium OverDrive processor with MMX
technology. The Pentium OverDrive processor with
MMX technology will have a unique CPUID from the
original Pentium processor and the Pentium
processor with MMX technology (154xH Vs. 052xH
and 054xH). The type field is defined in Table 11.