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參數(shù)資料
| 型號： | pentium III processor |
| 廠商： | Intel Corp. |
| 英文描述： | 32 bit Processor Mobile Module(32 位帶移動(dòng)模塊處理器) |
| 中文描述： | 32位處理器的移動(dòng)模塊（32位帶移動(dòng)模塊處理器） |
| 文件頁數(shù)： | 31/67頁 |
| 文件大?。?/td> | 834K |
| 代理商： | PENTIUM III PROCESSOR |
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Pentium
III Processor Mobile Module MMC-2
Featuring Intel
SpeedStep
Technology
243356-005
Datasheet
25
Figure 3. Clock Control States
4.5.1.1
Normal State
The Normal state is the normal operating mode where the processor's core clock is running, and the
processor is actively executing instructions.
4.5.1.2
Auto Halt State
This is a low-power mode entered by the processor through the execution of the HLT instruction.
The power level of this mode is similar to the Stop Grant state. A transition to the Normal state is
made by a halt break event (one of the following signals going active: NMI, INTR, BINIT#, INIT#,
RESET#, FLUSH#, or SMI#).
HALT/Grant
Snoop
Normal
HS=false
Stop
Grant
Auto
HS=true
Quick
Start
Sleep
Deep
Sleep
(!STPCLK#
and !HS) or
stop break
STPCLK# and
!QSE and SGA
Snoop
occurs
Snoop
serviced
STPCLK# and
QSE and SGA
(!STPCLK# and !HS)
or RESET#
Snoop
serviced
Snoop
occurs
!STPCLK#
and HS
STPCLK# and
!QSE and SGA
HLT and
halt bus cycle
halt
break
Snoop
serviced
Snoop
occurs
STPCLK# and
QSE and SGA
!STPCLK#
and HS
!SLP# or
RESET#
SLP#
BCLK
stopped
BCLK on
and !QSE
BCLK
stopped
BCLK on
and QSE
NOTES:
Halt break – A20M#, BINIT#, FLUSH#, INIT#, INTR, NMI, PREQ#, RESET#, SMI#
HLT – HLT instruction executed
HS – Processor Halt State
QSE – Quick Start State Enabled
SGA – Stop Grant Acknowledge bus cycle issued
Stop break – BINIT#, FLUSH#, RESET#
Intel mobile modules do not support shaded clock control states
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