243356-005
Datasheet
iii
Pentium
III Processor Mobile Module MMC-2
Featuring Intel
SpeedStep
Technology
Contents
1.0
Introduction.........................................................................................................................1
1.1
References............................................................................................................1
2.0
Architecture Overview........................................................................................................3
3.0
Signal Information ..............................................................................................................5
3.1
Signal Definitions...................................................................................................5
3.1.1
Signal List.................................................................................................6
3.1.2
Memory Signal Description ......................................................................7
3.1.3
AGP Signals.............................................................................................8
3.1.4
PCI Signals.............................................................................................10
3.1.5
Intel SpeedStep Technology Signals .....................................................11
3.1.6
Processor and PIIX4E/M Sideband Signals...........................................12
3.1.7
Power Management Signals ..................................................................13
3.1.8
Clock Signals..........................................................................................14
3.1.9
Voltage Signals ......................................................................................15
3.1.10 ITP and JTAG Pins.................................................................................16
3.1.11 Miscellaneous Pins.................................................................................16
3.2
Connector Pin Assignments................................................................................17
3.3
Pin and Pad Assignments...................................................................................19
4.0
Functional Description......................................................................................................21
4.1
Pentium III Processor Mobile Module Featuring Intel SpeedStep Technology...21
4.2
L2 Cache.............................................................................................................21
4.3
The 82443BX Host Bridge System Controller.....................................................21
4.3.1
Memory Organization.............................................................................21
4.3.2
Reset Strap Options...............................................................................22
4.3.3
PCI Interface ..........................................................................................22
4.3.4
AGP Interface.........................................................................................23
4.4
Intel SpeedStep Technology...............................................................................23
4.5
Power Management............................................................................................23
4.5.1
Clock Control Architecture......................................................................23
4.5.1.1 Normal State .............................................................................25
4.5.1.2 Auto Halt State ..........................................................................25
4.5.1.3 Stop Grant State........................................................................26
4.5.1.4 Quick Start State .......................................................................26
4.5.1.5 HALT/Grant Snoop State ..........................................................27
4.5.1.6 Sleep State................................................................................27
4.5.1.7 Deep Sleep State ......................................................................27
4.6
Power Consumption in Power Management Modes...........................................28
5.0
Electrical Specifications....................................................................................................31
5.1
System Bus Clock Signal Quality Specifications.................................................31
5.1.1
BCLK DC Specifications.........................................................................31
5.1.2
BCLK AC Specifications.........................................................................31
5.2
System Power Requirements..............................................................................33
5.3
Processor Core Voltage Regulation....................................................................33