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參數(shù)資料
| 型號： | PDI1394L21 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Full Duplex AV Link Layer Ccontroller(全雙工AV鏈接層控制器) |
| 中文描述： | 全雙工鏈路層Ccontroller影音（全雙工視聽鏈接層控制器） |
| 文件頁數(shù)： | 17/54頁 |
| 文件大?。?/td> | 242K |
| 代理商： | PDI1394L21 |
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Philips Semiconductors
Preliminary specification
PDI1394L21
1394 full duplex AV link layer controller
2000 Jun 06
17
Table 3.
Block Transmit Field
Field Name
Description
spd, tLabel, rt, tCode, destinationID,
destinationOffsetHigh, destinationOffsetLow, rCode
See Table 2.
dataLength
The number of bytes of data to be transmitted in this packet
extendedTcode
The tCode indicates a lock transaction, this specifies the actual lock action to be
performed with the data in this packet.
block data
The data to be sent. If dataLength=0, no data should be written into the FIFO for
this field. Regardless of the destination or source alignment of the data, the first
byte of the block must appear in the high order byte of the first quadlet.
padding
If the dataLength mod 4 is not zero, then zero-value bytes are added onto the end
of the packet to guarantee that a whole number of quadlets is sent.
12.5.1.4
The unformatted transmit format is shown in Figure 13. The first quadlet contains packet control information. The remaining quadlets contain
data that is transmitted without any formatting on the bus. No CRC is appended on the packet, nor is any data in the first quadlet sent. This is
used to send PHY configuration and Link-on packets. Note that the bit-inverted check quadlet must be included in the FIFO since the AV Link
core will not generate it.
Unformatted Transmit
spd
tLabel
1110
0000
29 28 272625 24 23 22 212019 18 1716 15 1413 12 11 10 9 8 7 6 5 4 3 2 1 0
unformatted packet data
SV00256
31 30
Figure 13. Unformatted Transmit Format
12.5.2
This section describes the asynchronous receive packet formats. Four basic asynchronous data packet formats and one confirmation format exist:
Asynchronous Receive Packet Formats
Table 4. Asynchronous Data Packet Formats
ITEM
FORMAT
USAGE
TRANSACTION CODE
1
No packet data
No-packet data
Quadlet read requests
4
Quadlet/block write responses
2
2
Quadlet packet
Qaudlet write requests
0
Quadlet read responses
6
Block read requests
5
Block write requests
1
3
Block Packet
Block read responses
7
Lock requests
9
Lock responses
B
hex
E
hex
8
4
Self-ID / PHY packet
Concatenated self-ID / PHY packets
5
Confirmation packet
Confirmation of packet transmission
Each packet format uses several fields. More information about most of these fields can be found in the 1394 specification.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PDI1394L41 | Content Protection AV Link Layer(內(nèi)容可保護(hù)的AV鏈接層控制器) |
| PDI1394P21 | 3-port Physical Layer Interface(三端口物理層接口) |
| PDI1394P22 | 3-port Physical Layer Interface(三端口物理層接口) |
| PDI1394P24 | 2-port 400 Mbps physical layer interface(2端口 400 Mbps物理層接口) |
| PDI40C1D00 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDI1394L21BE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 full duplex AV link layer controller |
| PDI1394L21BP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 full duplex AV link layer controller |
| PDI1394L40 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 enhanced AV link layer controller |
| PDI1394L40BE | 制造商:NXP Semiconductors 功能描述:1 CHANNEL(S), 400M BPS, SERIAL COMM CONTROLLER, PQFP144 |
| PDI1394L40BE,518 | 功能描述:視頻 IC 1394 A/V LINK LAYER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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