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| 型號(hào)： | PCA9665N |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 總線(xiàn)控制器 |
| 英文描述： | Fm+ parallel bus to I2C-bus controller |
| 中文描述： | I2C BUS CONTROLLER, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, SOT146-1, DIP-20 |
| 文件頁(yè)數(shù)： | 25/91頁(yè) |
| 文件大小： | 372K |
| 代理商： | PCA9665N |
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PCA9665_2
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 7 December 2006
25 of 91
NXP Semiconductors
PCA9665
Fm+ parallel bus to I
2
C-bus controller
8.3.3
Slave Receiver Byte mode
In the Slave Receiver Byte mode, a number of data bytes are received from a master
transmitter one byte at a time (see
Figure 9
). To initiate the Slave Receiver mode, I2CADR
and I2CCON must be loaded as shown in
Table 29
and
Table 30
.
The upper 7 bits are the I
2
C-bus address to which PCA9665 will respond when addressed
by a master. GC is the control bit that allows the PCA9665 to respond or not to the
General Call address (00h).
When programmed to logic 1, the PCA9665 will acknowledge the General Call address.
When programmed to logic 0, the PCA9665 will not acknowledge the General Call
address.
ENSIO must be set to logic 1 to enable the I
2
C-bus interface. The AA bit must be set to
enable PCA9665 to acknowledge its own slave address, STA, STO, and SI must be reset.
When I2CADR and I2CCON have been initialized, the PCA9665 waits until it is addressed
by its own slave address followed by the data direction bit which must be ‘0’ (W) to operate
in the Slave Receiver mode. After its own slave address and the W bit have been
received, the Serial Interrupt flag (SI) is set, the Interrupt line (INT) goes LOW, and
I2CSTA is loaded with 60h. This status code is used to vector to an interrupt service
routine, and the appropriate action to be taken is detailed in
Table 31
.
The Slave Receiver Buffered mode may also be entered when:
The arbitration is lost while the PCA9665 is in the master mode. See status 68h and
D8h.
The General Call Address (00h) has been received (General Call address enabled
with GC = 1). See status D0h.
If the AA bit is reset during a transfer, the PCA9665 will return a not acknowledge (logic 1)
on SDA after the next received data byte. While AA is reset, the I
2
C-bus state machine
does not respond to its own slave address. However, the I
2
C-bus is still monitored and
address recognition may be resumed at any time by setting AA. This means that the AA
bit may be used to temporarily isolate PCA9665 from the I
2
C-bus.
Table 29.
Bit
Symbol
Value
I2CADR initialization
7
AD7
6
5
4
3
2
1
0
AD6
AD5
AD4
AD3
AD2
AD1
GC
X
own slave address
Table 30.
Bit
Symbol
Value
I2CCON initialization
7
AA
1
6
5
4
3
SI
0
2
-
X
1
-
X
0
ENSIO
1
STA
0
STO
0
MODE
0
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| PCA9665N,112 | 功能描述:I2C 接口集成電路 FM+ I2C BUS CONTRLLR RoHS:否 制造商:NXP Semiconductors 電源電壓-最大:5.5 V 電源電壓-最小:2.3 V 最大工作頻率:400 KHz 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-16 |
| PCA9665PW | 制造商:NXP Semiconductors 功能描述:IC CNTRLR PARALLEL I2C 20TS 制造商:UNBRANDED 功能描述:UNIVERSAL BUS FUNCTIONS FM+12C BUS *NIC* 制造商:NXP Semiconductors 功能描述:IC, CNTRLR PARALLEL, I2C, 20TSSOP 制造商:NXP Semiconductors 功能描述:IC, CNTRLR PARALLEL, I2C, 20TSSOP; Interface Type:I2C, Parallel, SMBus; Interface Applications:I2C Bus & SMBus Systems Applications; Supply Voltage Min:2.3V; Supply Voltage Max:3.6V; Digital IC Case Style:TSSOP; No. of Pins:20; ;RoHS Compliant: Yes |
| PCA9665PW,112 | 功能描述:I2C 接口集成電路 FM+ I2C BUS CONTRLLR RoHS:否 制造商:NXP Semiconductors 電源電壓-最大:5.5 V 電源電壓-最小:2.3 V 最大工作頻率:400 KHz 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-16 |
| PCA9665PW,118 | 功能描述:I2C 接口集成電路 FM+ I2C BUS CONTRLLR RoHS:否 制造商:NXP Semiconductors 電源電壓-最大:5.5 V 電源電壓-最小:2.3 V 最大工作頻率:400 KHz 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-16 |
| PCA9665PW,118-CUT TAPE | 制造商:NXP 功能描述:PCA9635 Series 1 MHz Fm + Parallel Bus to I2C-Bus Controller - TSSOP-20 |
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