參數(shù)資料
型號: MX29F8100
廠商: Macronix International Co., Ltd.
英文描述: 8M-BIT [1M x 8/512K x 16] CMOS SINGLE VOLTAGE FLASH MEMORY
中文描述: 800萬位[100萬x 8/512K × 16] CMOS單電壓閃存
文件頁數(shù): 22/37頁
文件大?。?/td> 225K
代理商: MX29F8100
22
P/N: PM0262
REV. 2.0, JAN. 22, 1999
MX29F8100
29F8100-12
MIN.
29F8100-15
MIN.
SYMBOL
DESCRIPTIONS
MAX.
MAX.
UNIT
CONDITIONS
tACC
Address to Output Delay
120
150
ns
CE=OE=VIL
tCE
CE to Output Delay
120
150
ns
OE=VIL
tOE
OE to Output Delay
60
70
ns
CE=VIL
tDF
OE High to Output Delay
0
55
0
55
ns
CE=VIL
tOH
Address to Output hold
0
0
ns
CE=OE=VIL
tBACC
BYTE to Output Delay
120
150
ns
CE= OE=VIL
tBHZ
BYTE Low to Output in High Z
55
55
ns
CE=VIL
tDPR
Deep Power-Down Recovery
700
800
ns
DC CHARACTERISTICS
= 0
°
C to 70
°
C, VCC = 5V
±
10%(CONTINUE P.21)
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at VCC = 5.0V, T = 25
°
C. These currents are valid for all product
versions (package and speeds).
2. ICC3 is specified with the device de-selected. If the device is read while in erase suspend mode, current draw is the sum of ICC3
and ICC1/2.
3. VIL min. = -1.0V for pulse width < 50ns.
VIL min. = -2.0V for pulse width < 20ns.
4. VIH max. = VCC + 1.5V for pulse width < 20ns. If VIH is over the specified maximum value, read operation cannot be guaranteed.
AC CHARACTERISTICS
READ OPERATIONS
TEST CONDITIONS:
Input pulse levels: 0.45V/2.4V
Input rise and fall times: 10ns
Output load: 1TTL gate+100pF(Including scope and jig)
Reference levels for measuring timing: 0.8V, 2.0V
NOTE:
1. tDF is defined as the time at which the output achieves the
open circuit condition and data is no longer driven.
INDEX
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