參數(shù)資料
型號(hào): MT90871
廠商: Zarlink Semiconductor Inc.
英文描述: Flexible 8K Digital Switch (F8KDX)
中文描述: 靈活的8K的數(shù)字交換機(jī)(F8KDX)
文件頁(yè)數(shù): 42/65頁(yè)
文件大?。?/td> 639K
代理商: MT90871
MT90871
Data Sheet
42
Zarlink Semiconductor Inc.
13.7
Backplane Input Bit Delay Registers (BIDR0 to BIDR15)
Address 0063h to 0072h
Sixteen Backplane input delay registers (BIDR0 to BIDR15) allow users to program the input bit delay for the
Backplane input data streams BSTi0-15. The possible adjustment is 7 of the data rate, in steps of of the data
rate. The data rate can be either 2Mb/s, 4Mb/s, 8Mb/s, or 16Mb/s.
The
BIDR0 to BIDR15
registers are configured as follows:
13.7.1
Backplane Input Delay Bits 4-0 (BID4 - BID0 )
These five bits define how long in the cycle the serial interface receiver takes to recognize and stores the bit 0 from
the BSTi input pins: i.e., start assuming a new frame. Input bit delay adjustment can range up to 7
3
/
4
bit periods
forward with resolution of
1
/
4
bit period.
This can be described as
BIDn(4:0) = (no. of bits delay) / 4
For example, if BID(4:0) is set to 10011 (19), the
input bit delay = 19 *
1
/
4
= 4
3
/
4.
Table 23 illustrates the bit delay selection.
Input Stream
Channel Delay
Corresponding Delay Bits
BCD7-BCD0
0 Channel (Default)
0000 0000
1 Channel
0000 0001
2 Channels
0000 0010
3 Channels
0000 0011
4 Channels
0000 0100
5 Channels
0000 0101
...
...
...
...
253 Channels
1111 1101
254 Channels
1111 1110
255 Channels
1111 1111
Table 21- Backplane Input Channel Delay (BCD) Programming Table
BIDRn Bit
(where n = 0 to 15)
Name
Reset
Description
15-5
Reserved
0
Reserved
4-0
BID(4:0)
0
Backplane Input Bit Delay Register
The binary value of these bits refers to the input
bit delay value for the Backplane input stream
Table 22- Backplane Input Bit Delay Register (BIDRn) Bits
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MT90880 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT90880B 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT90880B/IG 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors