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參數(shù)資料
| 型號(hào)： | MT90871 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Flexible 8K Digital Switch (F8KDX) |
| 中文描述： | 靈活的8K的數(shù)字交換機(jī)（F8KDX） |
| 文件頁數(shù)： | 16/65頁 |
| 文件大?。?/td> | 639K |
| 代理商： | MT90871 |
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MT90871
Data Sheet
16
Zarlink Semiconductor Inc.
Figure 11 - Backplane and Local Input Bit Delay Timing Diagram for Data Rate of 8Mb/s
3.3
Output Advancement Programming (Backplane and Local Output Streams)
This feature is used to advance the output channel alignment of individual Local or Backplane output streams
with respect to the frame boundary. Each output stream has its own advancement value which can be
programmed by the output advancement registers. The output advancement selection is useful in
compensating for various parasitic loading on the serial data output pins.
3.3.1
Local Output Advancement Programming
The Local output advancement registers,
LOAR0-15
, are used to control the Local output advancement. The
advancement is determined with reference to the internal system clock rate (131.072MHz). For 2Mb/s, 4Mb/s,
8Mb/s or 16Mb/s streams the advancement may be 0, -2 cycles, -4 cycles or -6 cycles, which converts to
approximately 0ns, -15ns, -30ns or -45ns as shown in Figure 12.
3.3.2
Backplane Output Advancement Programming
The Backplane output advancement registers,
BOAR0-15
are used to control the Backplane output
advancement. The advancement is determined with reference to the internal system clock rate (131.072MHz).
For 2Mb/s, 4Mb/s, 8Mb/s or 16Mb/s streams the advancement may be 0, -2 cycles, -4 cycles or -6 cycles,
which converts to approximately 0ns, -15ns, -30ns or -45ns as shown in Figure 12.
C8o
7
2
3
4
5
6
1
0
BSTi0-15/LSTi0-15
Bit Delay = 0
Ch0
7
4
5
6
Ch1
2
3
1
0
BSTi0-15/LSTi0-15
Bit Delay = 1/4
7
2
3
4
5
6
1
0
BSTi0-15/LSTi0-15
Bit Delay = 1
Ch0
7
5
6
Ch1
2
3
1
0
(Default)
7
2
3
4
5
6
1
0
Ch0
7
4
5
6
Ch1
2
3
1
0
Ch127
Ch127
Ch127
Bit Delay, 1/4
Bit Delay, 1
BSTi0-15/LSTi0-15
Bit Delay = 1/2
7
2
3
4
5
6
1
0
Ch0
7
4
5
6
Ch1
2
3
1
0
Ch127
Bit Delay, 1/2
BSTi0-15/LSTi0-15
Bit Delay = 3/4
7
2
3
4
5
6
1
0
Ch0
7
4
5
6
Ch1
2
3
1
0
Ch127
Bit Delay, 3/4
BSTi0-15/LSTi0-15
Bit Delay = 7
1/2
7
2
3
4
5
6
1
0
Ch127
7
4
5
6
Ch0
2
1
0
Ch126
Bit Delay, 7
1/2
BSTi0-15/LSTi0-15
Bit Delay = 7
3/4
7
2
3
4
5
6
1
0
Ch127
7
4
5
6
Ch0
2
1
0
Ch126
Bit Delay, 7
3/4
FP8o
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相關(guān)代理商/技術(shù)參數(shù) |
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| MT90871AV | 制造商:Microsemi Corporation 功能描述:FLEXIBLE 8K DIGITAL SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F8KDX 196PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F8KDX 196PBGA |
| MT90871AV2 | 制造商:Microsemi Corporation 功能描述:PB FREE FLEXIBLE 8K DIGITAL SWITCH - Bulk 制造商:Microsemi Corporation 功能描述:IC, TDM SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F8KDX 196PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F8KDX 196PBGA |
| MT90880 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
| MT90880B | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
| MT90880B/IG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
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