參數(shù)資料
型號: MT90871
廠商: Zarlink Semiconductor Inc.
英文描述: Flexible 8K Digital Switch (F8KDX)
中文描述: 靈活的8K的數(shù)字交換機(jī)(F8KDX)
文件頁數(shù): 35/65頁
文件大小: 639K
代理商: MT90871
Data Sheet
MT90871
35
Zarlink Semiconductor Inc.
Figure 17 - Frame Boundary Conditions, ST- BUS Operation
2-0
MS(2:0)
0
Memory Select Bits.
These three bits select the connection or data memory for subsequent micro-port
memory access operations:
000, Local Connection Memory (LCM) is selected for Read or Write operations.
001, Backplane Connection Memory (BCM) is selected for Read or Write
operations. 010, Local Data Memory is selected for Read-only operation. 011,
Backplane Data Memory is selected for Read-only operation.
Bit
Name
Reset
Description
Table 13- Control Register Bits (continued)
Frame Boundary
C8i_b
FP8i_b
Frame Pulse Width = 122ns,
Control Register Bit8 (FPW) = 0
Control Register Bit6 (C8IPOL) = 0
(a)
Frame Pulse Width = 122ns,
Control Register Bit8 (FPW) = 0
Control Register Bit6 (C8IPOL) = 1
(b)
Frame Pulse Width = 244ns,
Control Register Bit8 (FPW) = 1
Control Register Bit6 (C8IPOL) = 0
(c)
Frame Pulse Width = 244ns,
Control Register Bit8 (FPW) = 1
Control Register Bit6 (C8IPOL) = 1
(d)
C8i_b
FP8i_b
C8i_b
FP8i_b
C8i_b
FP8i_b
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參數(shù)描述
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MT90880 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT90880B 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors
MT90880B/IG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors