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參數(shù)資料
| 型號： | MT18HVF6472PY-53EXX |
| 元件分類： | DRAM |
| 英文描述： | 64M X 72 DDR DRAM MODULE, 0.5 ns, DMA240 |
| 封裝： | LEAD FREE, DIMM-240 |
| 文件頁數(shù)： | 17/47頁 |
| 文件大?。?/td> | 1012K |
| 代理商： | MT18HVF6472PY-53EXX |
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PDF: 09005aef81c753e1/ Source: 09005aef81c753af
Micron Technology, Inc., reserves the right to change products or specifications without notice.
HVF18C64_128_256x72G_2.fm - Rev. A 8/05 EN
24
2003 Micron Technology, Inc. All rights reserved.
512MB, 1GB, 2GB: (x72, SR) 240-Pin DDR2 VLP RDIMM
Command Truth Tables
Table 7, Commands Truth Table provides a quick reference of DDR2 SDRAM device
available commands. Refer to the 256Mb, 512Mb, or 1Gb DDR2 SDRAM component
data sheet for more Truth Table definitions, including CKE power-down modes and
device bank-to-bank commands.
Notes: 1. All DDR2 SDRAM device commands are defined by states of S#, RAS#, CAS#, WE#, and CKE
at the rising edge of the clock.
2. Device Bank addresses (BA) BA0–BA1/BA2 determine which device bank is to be operated
upon. For EMR, BA selects an extended mode register.
3. Burst reads or writes at BL = 4 cannot be terminated or interrupted. Refer to the 256Mb,
512Mb, or 1Gb DDR2 SDRAM discrete data sheet for other restrictions or details.
4. The Power Down Mode does not perform any refresh operations. The duration of power-
down is therefore limited by the refresh requirements outlined in the AC parametric sec-
tion.
5. The state of ODT does not affect the states described in this table. The ODT function is not
available during self refresh. Refer to the 256Mb, 512Mb, or 1Gb DDR2 SDRAM discrete
data sheet for other restrictions or details.
6. “X” means “H or L” (but a defined logic level).
7. Self refresh exit is asynchronous.
8. BA2 valid for 2GB only; A13 valid for 1GB and 2GB only.
Table 7:
Commands Truth Table
Notes: 1, 5, 6
Function
CKE
S#
RAS# CAS#
WE#
BA28,
BA1,
BA0
A138–
A11
A10
A9–A0
Notes
Previous
Cycle
Current
Cycle
Mode Register Set
H
L
BA
OP Code
2
Refresh
H
L
H
XX
Self Refresh Entry
H
L
H
XX
Self Refresh Exit
L
H
XXX
X
L
H
XX
Single Device Bank
Precharge
HH
L
H
L
BA
X
L
X
ALL Device Banks
Precharge
HH
L
H
L
X
H
X
Device Bank Activate
H
L
H
BA
Row Address
Write
H
L
H
L
BA
Column
Address
L
Column
Address
Write with Auto
Precharge
H
L
H
L
BA
Column
Address
H
Column
Address
Read
H
LHLH
BA
Column
Address
L
Column
Address
Read with Auto
Precharge
H
LHLH
BA
Column
Address
H
Column
Address
No Operation
H
X
L
H
XX
Device Deselect
H
X
H
X
XX
Power-Down Entry
H
L
H
X
XX
L
H
XX
Power-Down Exit
L
H
X
XX
L
H
XX
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| MT18HVF6472Y-53EB1 | 功能描述:MODULE DDR2 512MB 240-DIMM VLP RoHS:是 類別:存儲卡，模塊 >> 存儲器 - 模塊 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 存儲器類型:SDRAM 存儲容量:1GB 速度:133MHz 特點:- 封裝/外殼:168-DIMM |
| MT18HVS25672CHY-53EE1 | 制造商:Micron Technology Inc 功能描述:2GB 256MX72 DDR2 SDRAM MODULE PBF VLPSOCDIMM 1.8V NON BUF - Trays |
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| MT18HVS25672PKY-667E1 | 制造商:Micron Technology Inc 功能描述: |
| MT18HVS25672PKY-667G1 | 制造商:Micron Technology Inc 功能描述: |
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