參數(shù)資料
型號(hào)： MT18HVF6472PY-53EXX
元件分類： DRAM
英文描述： 64M X 72 DDR DRAM MODULE, 0.5 ns, DMA240
封裝： LEAD FREE, DIMM-240
文件頁(yè)數(shù)： 14/47頁(yè)
文件大小： 1012K
代理商： MT18HVF6472PY-53EXX
PDF: 09005aef81c753e1/ Source: 09005aef81c753af
Micron Technology, Inc., reserves the right to change products or specifications without notice.
HVF18C64_128_256x72G_2.fm - Rev. A 8/05 EN
21
2003 Micron Technology, Inc. All rights reserved.
512MB, 1GB, 2GB: (x72, SR) 240-Pin DDR2 VLP RDIMM
Posted CAS Additive Latency (AL)
allow the user to program the DDR2 SDRAM device with a CAS# additive latency of 0, 1,
2, 3, or 4 clocks. Reserved states should not be used as unknown operation or incompat-
ibility with future versions may result.
In this operation, the DDR2 SDRAM device allows a READ or WRITE command to be
issued prior to tRCD (MIN) with the requirement that AL ≤ tRCD(MIN). A typical appli-
cation using this feature would set AL = tRCD (MIN) - 1 x tCK. The READ or WRITE com-
mand is held for the time of the additive latency (AL) before it is issued internally to the
DDR2 SDRAM device. READ Latency (RL) is controlled by the sum of the Posted CAS
additive latency (AL) and CAS Latency (CL); RL = AL + CL. Write latency (WL) is equal to
READ latency minus one clock; WL = AL + CL - 1 x tCK. An example of a READ latency is
shown in Figure 8, "Read Latency," on page 21. An example of a WRITE latency is shown
Figure 8:
READ Latency
Figure 9:
Write Latency
DOUT
n + 3
DOUT
n + 2
DOUT
n + 1
CK
CK#
COMMAND
DQ
DQS, DQS#
AL = 2
ACTIVE n
Burst length = 4
Shown with nominal tAC, tDQSCK, and tDQSQ
T0
T1
T2
DON’T CARE
TRANSITIONING DATA
READ n
NOP
DOUT
n
T3
T4
T5
NOP
T6
NOP
T7
T8
NOP
CL = 3
RL = 5
CAS# latency (CL) = 3
Additive latency (AL) = 2
READ latency (RL) = AL + CL = 5
tRCD (MIN)
NOP
CK
CK#
COMMAND
DQ
DQS, DQS#
ACTIVE n
Burst length = 4
T0
T1
T2
DON’T CARE
TRANSITIONING DATA
NOP
T3
T4
T5
NOP
WRITE n
T6
NOP
Din
n + 3
Din
n + 2
Din
n + 1
WL = AL + CL - 1 = 4
T7
NOP
Din
n
CAS# latency (CL) = 3
Additive latency (AL) = 2
WRITE latency = AL + CL -1 = 4
tRCD (MIN)
NOP
AL = 2
CL - 1 = 2
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