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參數(shù)資料
| 型號： | MSC8103M1200F |
| 廠商： | MOTOROLA INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 64-BIT, 75 MHz, OTHER DSP, PBGA332 |
| 封裝： | 17 X 17 MM, FLIP-CHIP, PLASTIC, BGA-332 |
| 文件頁數(shù)： | 57/120頁 |
| 文件大?。?/td> | 1952K |
| 代理商： | MSC8103M1200F |
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1-37
Communications Processor Module (CPM) Ports
PC13
SI1: L1ST4
SCC2: CTS,CLSN
FCC1:TXADDR1
UTOPIA master
FCC1: TXADDR1
UTOPIA slave
Output
Input
Output
Input
Serial Interface 1: Layer 1 Strobe 4
In the time-slot assigner supported by SI1. The MSC8103
time-slot assigner supports up to four strobe outputs that can
be asserted on a bit or byte basis. The strobe outputs are
useful for interfacing to other devices that do not support the
multiplexed interface or for enabling/disabling three-state I/O
buffers in a multiple-transmitter architecture. These strobes
can also generate output wave forms for such applications as
stepper-motor control.
SCC2: Clear to Send, Collision
Typically used in conjunction with RTS. The MSC8103 SCC2
transmitter sends out a request to send data signal (RTS).
The request is accepted when CTS is returned low. CLSN is
the signal used in Ethernet mode. See also PC28.
FCC1: UTOPIA Multi-PHY Master Transmit Address Bit 1
In the ATM UTOPIA master interface supported by FCC1, this
is transmit address bit 1.
FCC1: UTOPIA Multi-PHY Slave Transmit Address Bit 1
In the ATM UTOPIA slave interface supported by FCC1, this
is transmit address bit 1.
PC12
SI1: L1ST3
SCC2: CD, RENA
FCC1: RXADDR1
UTOPIA master
FCC1: RXADDR1
UTOPIA slave
Output
Input
Output
Input
Serial Interface 1: Layer 1 Strobe 3
In the time-slot assigner supported by SI1. The MSC8103
time-slot assigner supports up to four strobe outputs that can
be asserted on a bit or byte basis. The strobe outputs are
useful for interfacing to other devices that do not support the
multiplexed interface or for enabling/disabling three-state I/O
buffers in a multiple-transmitter architecture. These strobes
can also generate output wave forms for such applications as
stepper-motor control.
SCC2: Carrier Detect, Request Enable
Typically used in conjunction with RTS supported by SCC2.
The MSC8103 SCC2 transmitter requests to the receiver that
it sends data by asserting RTS low. The request is accepted
when CTS is returned low.
FCC1: UTOPIA Multi-PHY Master Receive Address Bit 1
In the ATM UTOPIA master interface supported by FCC1, this
is receive address bit 1.
FCC1: UTOPIA Multi-PHY Slave Receive Address Bit 1
In the ATM UTOPIA slave interface supported by FCC1, this
is receive address bit 1.
Table 1-9. Port C Signals (Continued)
Name
Dedicated
I/O Data
Direction
Description
General-
Purpose
I/O
Peripheral Controller:
Dedicated I/O
Protocol
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSC8103RM/D | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Network Digital Signal Processor |
| MSC8103VT1100F | 功能描述:IC DSP 16BIT 275MHZ 332-FCPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:StarCore 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| MSC8103VT1200F | 功能描述:IC DSP 16BIT 300MHZ 332-FCPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:StarCore 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| MSC81058 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
| MSC81090 | 制造商:ASI 制造商全稱:ASI 功能描述:NPN SILICON RF POWER TRANSISTOR |
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