參數(shù)資料
型號: MPC5200VR400BR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA272
封裝: 27 X 27 MM, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, BGA-272
文件頁數(shù): 7/72頁
文件大?。?/td> 978K
代理商: MPC5200VR400BR2
MPC5200B Data Sheet, Rev. 4
Freescale Semiconductor
15
For additional information, see the MPC5200B User’s Manual (MPC5200BUM).
1.3.4.1
Reset Configuration Word
During reset (HRESET and PORRESET) the Reset Configuration Word is latched in the related Reset Configuration Word
Register with each rising edge of the SYS_XTAL signal. If both resets (HRESET and PORRESET) are inactive (high), the
contents of this register are locked immediately with the SYS_XTAL clock (see Figure 3).
Figure 3. Reset Configuration Word Locking
NOTE
Beware of changing the values on the pins of the reset configuration word after the
deassertion of PORRESET. This may cause problems because it may change the internal
clock ratios and so extend the PLL locking process.
1.3.5
External Interrupts
The MPC5200B provides three different kinds of external interrupts:
Four IRQ interrupts
Eight GPIO interrupts with simple interrupt capability (not available in power-down mode)
Eight WakeUp interrupts (special GPIO pins)
The propagation of these three kinds of interrupts to the core is shown in the following graphic:
sample
sample sample
sample
LOCK
RST_CFG_WRD
HRESET
PORRESET
SYS_XTAL
4096 clocks
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