參數(shù)資料
型號: MPC5200VR400BR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA272
封裝: 27 X 27 MM, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, BGA-272
文件頁數(shù): 48/72頁
文件大?。?/td> 978K
代理商: MPC5200VR400BR2
MPC5200B Data Sheet, Rev. 4
52
Freescale Semiconductor
Figure 42. Timing Diagram — SPI Slave Mode, Format 0 (CPHA = 0)
NOTE
Output timing is specified at a nominal 50 pF load.
Table 48. Timing Specifications — SPI Master Mode, Format 1 (CPHA = 1)
Sym
Description
Min
Max
Units
SpecID
1
SCK cycle time, programable in the PSC CCS register
30.0
ns
A15.46
2
SCK pulse width, 50% SCK duty cycle
15.0
ns
A15.47
3
Slave select clock delay, programable in the PSC CCS register
30.0
ns
A15.48
4
Output data valid
8.9
ns
A15.49
5
Input Data setup time
6.0
ns
A15.50
6
Input Data hold time
1.0
ns
A15.51
7
Slave disable lag time
8.9
ns
A15.52
8
Sequential Transfer delay, programable in the PSC CTUR / CTLR
register
15.0
ns
A15.53
9
Clock falling time
7.9
ns
A15.54
10
Clock rising time
7.9
ns
A15.55
SCK
(CLKPOL=0)
SCK
(CLKPOL=1)
MOSI
Input
SS
Input
MISO
Output
1
22
9
3
7
4
6
5
8
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